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74ALVC38_05 PDF预览

74ALVC38_05

更新时间: 2024-11-06 05:05:51
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
5页 93K
描述
Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs

74ALVC38_05 数据手册

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December 2001  
Revised March 2005  
74ALVC38  
Low Voltage Quad 2-Input NAND Gate with  
Open Drain Outputs and  
3.6V Tolerant Inputs and Outputs  
General Description  
The ALVC38 contains four 2-input NAND gates with open  
drain outputs. This product is designed for low voltage  
(1.4V to 3.6V) VCC applications with I/O compatibility up to  
Features  
1.4V to 3.6V VCC supply operation  
3.6V tolerant inputs and outputs  
tPD  
3.6V.  
3.3 ns max for 3.0V to 3.6V VCC  
4.2 ns max for 2.3V to 2.7V VCC  
The ALVC38 is fabricated with advanced CMOS technol-  
ogy to achieve high-speed operation while maintaining  
CMOS low power dissipation.  
6.7 ns max for 1.65V to 1.95V VCC  
Power-off high impedance inputs and outputs  
Uses patented Quiet Series noise/EMI reduction  
circuitry  
Latchup conforms to JEDEC JED78  
ESD performance:  
Human body model 2000V  
Machine model 250V  
Ordering Code:  
Order Number Package Number  
Package Description  
74ALVC38M  
M14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74ALVC38MTC  
MTC14  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
An, Bn  
On  
Description  
Inputs  
Outputs  
Quiet Series is a trademark of Fairchild Semiconductor Corporation.  
© 2005 Fairchild Semiconductor Corporation  
DS500719  
www.fairchildsemi.com  

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