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74ALVC38MTCX PDF预览

74ALVC38MTCX

更新时间: 2024-11-24 23:24:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
5页 74K
描述
Quad 2-input NAND Gate

74ALVC38MTCX 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:4.40 MM, MO-153, TSSOP-14
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.82
Is Samacsys:N系列:ALVC/VCX/A
JESD-30 代码:R-PDSO-G14JESD-609代码:e3
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:NAND GATE最大I(ol):0.024 A
湿度敏感等级:1功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:OPEN-DRAIN封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:3.3 ns传播延迟(tpd):6.7 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1.2 mm子类别:Gates
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

74ALVC38MTCX 数据手册

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December 2001  
Revised December 2001  
74ALVC38  
Low Voltage Quad 2-Input NAND Gate with  
Open Drain Outputs and  
3.6V Tolerant Inputs and Outputs  
General Description  
The ALVC38 contains four 2-input NAND gates with open  
drain outputs. This product is designed for low voltage  
(1.4V to 3.6V) VCC applications with I/O compatibility up to  
Features  
1.4V to 3.6V VCC supply operation  
3.6V tolerant inputs and outputs  
tPD  
3.6V.  
3.3 ns max for 3.0V to 3.6V VCC  
4.2 ns max for 2.3V to 2.7V VCC  
The ALVC38 is fabricated with advanced CMOS technol-  
ogy to achieve high-speed operation while maintaining  
CMOS low power dissipation.  
6.7 ns max for 1.65V to 1.95V VCC  
Power-off high impedance inputs and outputs  
Uses patented Quiet Series noise/EMI reduction  
circuitry  
Latchup conforms to JEDEC JED78  
ESD performance:  
Human body model > 2000V  
Machine model > 250V  
Ordering Code:  
Order Number Package Number  
Package Description  
74ALVC38M  
M14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74ALVC38MTC  
MTC14  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
An, Bn  
On  
Description  
Inputs  
Outputs  
Quiet Series is a trademark of Fairchild Semiconductor Corporation.  
© 2001 Fairchild Semiconductor Corporation  
ds500719  
www.fairchildsemi.com  

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