Datasheet > 74AHC273BQ-Q100

74AHC273BQ-Q100

更新时间： 2024-02-08 21:07:26

品牌	Logo	应用领域
安世 - NEXPERIA		逻辑集成电路触发器
页数	文件大小	规格书
19页	814K
描述
Octal D-type flip-flop with reset; positive-edge trigger

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技术参数
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74AHC273BQ-Q100 技术参数

是否Rohs认证：	符合	生命周期：	Transferred
零件包装代码：	QFN	包装说明：	2.50 X 4.50 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT764-1, DHVQFN-20
针数：	20	Reach Compliance Code：	compliant
风险等级：	5.75	Base Number Matches：	1

74AHC273BQ-Q100 数据手册

74AHC273-Q100;

74AHCT273-Q100

Octal D-type flip-flop with reset; positive-edge trigger

Rev. 1 — 27 March 2013

Product data sheet

1. General description

The 74AHC273-Q100; 74AHCT273-Q100 is a high-speed Si-gate CMOS device and is

pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with

JEDEC standard No. 7-A.

The 74AHC273-Q100; 74AHCT273-Q100 has eight edge-triggered, D-type flip-flops with

individual D inputs and Q outputs.

The common clock (CP) and master reset (MR) inputs, load and reset (clear) all flip-flops

simultaneously. The state of each D input, one set-up time before the LOW-to-HIGH clock

transition, is transferred to the corresponding output (Qn) of the flip-flop.

All outputs are forced LOW, independent of clock or data inputs, by a LOW on the MR

input.

The device is useful for applications where only the true output is required and the clock

and master reset are common to all storage elements.

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

 Automotive product qualification in accordance with AEC-Q100 (Grade 1)

 Specified from 40 C to +85 C and from 40 C to +125 C

 Balanced propagation delays

 All inputs have Schmitt-trigger actions

 Inputs accept voltages higher than V_CC

 Ideal buffer for MOS microcontroller or memory

 Common clock and master reset

 Input levels:

 For 74AHC273-Q100: CMOS level

 For 74AHCT273-Q100: TTL level

 ESD protection:

 MIL-STD-883, method 3015 exceeds 2000 V

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )

 Multiple package options

12 3 4 5 6 7...19

中文翻译

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与74AHC273BQ-Q100相关器件

型号	品牌	获取价格	描述	数据表
74AHC273BQ-Q100X	NXP	获取价格	74AHC(T)273-Q100 - Octal D-type flip-flop with reset; positive-edge trigger QFN 20-Pin
74AHC273D	NXP	获取价格	Octal D-type flip-flop with reset; positive-edge trigger
74AHC273D	NEXPERIA	获取价格	Octal D-type flip-flop with reset; positive-edge triggerProduction
74AHC273D,118	NXP	获取价格	74AHC(T)273 - Octal D-type flip-flop with reset; positive-edge trigger SOP 20-Pin
74AHC273D-Q100	NXP	获取价格	AHC/VHC/H/U/V SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, 7.50 MM, P
74AHC273D-Q100	NEXPERIA	获取价格	Octal D-type flip-flop with reset; positive-edge trigger
74AHC273D-T	NXP	获取价格	IC AHC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, 7.50 MM, PLASTIC,
74AHC273PW	NXP	获取价格	Octal D-type flip-flop with reset; positive-edge trigger
74AHC273PW	NEXPERIA	获取价格	Octal D-type flip-flop with reset; positive-edge triggerProduction
74AHC273PW,112	NXP	获取价格	74AHC(T)273 - Octal D-type flip-flop with reset; positive-edge trigger TSSOP2 20-Pin

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