74AC273MTC

更新时间： 2024-11-22 22:53:11

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		触发器逻辑集成电路光电二极管
页数	文件大小	规格书
10页	101K
描述
Octal D-Type Flip-Flop

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替代型号

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74AC273MTC 数据手册

November 1988

Revised August 2000

74AC273 • 74ACT273

Octal D-Type Flip-Flop

General Description

Features

■ Ideal buffer for microprocessor or memory

■ Eight edge-triggered D-type flip-flops

■ Buffered common clock

The AC273 and ACT273 have eight edge-triggered D-type

flip-flops with individual D-type inputs and Q outputs. The

common buffered Clock (CP) and Master Reset (MR) input

load and reset (clear) all flip-flops simultaneously.

■ Buffered, asynchronous master reset

■ See 377 for clock enable version

■ See 373 for transparent latch version

■ See 374 for 3-STATE version

The register is fully edge-triggered. The state of each D-

type input, one setup time before the LOW-to-HIGH clock

transition, is transferred to the corresponding flip-flop’s Q

output.

All outputs will be forced LOW independently of Clock or

Data inputs by a LOW voltage level on the MR input. The

device is useful for applications where the true output only

is required and the Clock and Master Reset are common to

all storage elements.

■ Outputs source/sink 24 mA

■ 74ACT273 has TTL-compatible inputs

Ordering Code:

Order Number Package Number

Package Description

74AC273SC

74AC273SJ

M20B

M20D

MTC20

N20A

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74AC273MTC

74AC273PC

74ACT273SC

74ACT273SJ

74ACT273MTC

74ACT273PC

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

M20B

M20D

MTC20

N20A

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC

FACT is a trademark of Fairchild Semiconductor Corporation.

DS009954

www.fairchildsemi.com

12 3 4 5 6 7...10

中文翻译

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74AC273MTC 替代型号

型号	品牌	替代类型	描述	数据表
74AC377MTCX	FAIRCHILD	完全替代	Octal D-Type Flip-Flop with Clock Enable
74AC273MTCX	FAIRCHILD	完全替代	Octal D-Type Flip-Flop
74AC377MTC	FAIRCHILD	类似代替	Octal D-Type Flip-Flop with Clock Enable

与74AC273MTC相关器件

型号	品牌	获取价格	描述	数据表
74AC273MTCX	FAIRCHILD	获取价格	Octal D-Type Flip-Flop
74AC273MTR	STMICROELECTRONICS	获取价格	OCTAL D-TYPE FLIP FLOP WITH CLEAR
74AC273PC	FAIRCHILD	获取价格	Octal D-Type Flip-Flop
74AC273PC_NL	FAIRCHILD	获取价格	D Flip-Flop, AC Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDIP20,
74AC273PCX	FAIRCHILD	获取价格	D Flip-Flop, 8-Func, Positive Edge Triggered, CMOS, PDIP20
74AC273SC	FAIRCHILD	获取价格	Octal D-Type Flip-Flop
74AC273SC_NL	FAIRCHILD	获取价格	D Flip-Flop, AC Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20,
74AC273SCT	FAIRCHILD	获取价格	D Flip-Flop, AC Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20,
74AC273SCTR	FAIRCHILD	获取价格	D Flip-Flop, AC Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20,
74AC273SCX	FAIRCHILD	获取价格	Octal D-Type Flip-Flop

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