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74AC11191N

更新时间： 2024-09-17 13:04:51
品牌 Logo 应用领域
德州仪器 - TI 计数器
页数 文件大小 规格书
10页 138K
描述
Synchronous 4-Bit Up/Down Binary Counters 20-PDIP -40 to 85

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74AC11191N 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：DIP
包装说明：DIP, DIP20,.3针数：20
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
风险等级：5.92计数方向：BIDIRECTIONAL
系列：ACJESD-30 代码：R-PDIP-T20
长度：24.325 mm负载电容（CL）：50 pF
负载/预设输入：YES逻辑集成电路类型：BINARY COUNTER
工作模式：SYNCHRONOUS位数：4
功能数量：1端子数量：20
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装等效代码：DIP20,.3封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3.3/5 V传播延迟（tpd）：12.7 ns
认证状态：Not Qualified座面最大高度：5.08 mm
子类别：Counters最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：CMOS
温度等级：INDUSTRIAL端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED触发器类型：POSITIVE EDGE
宽度：7.62 mm最小 fmax：100 MHz
Base Number Matches：1

74AC11191N 数据手册

 浏览型号74AC11191N的Datasheet PDF文件第2页浏览型号74AC11191N的Datasheet PDF文件第3页浏览型号74AC11191N的Datasheet PDF文件第4页浏览型号74AC11191N的Datasheet PDF文件第5页浏览型号74AC11191N的Datasheet PDF文件第6页浏览型号74AC11191N的Datasheet PDF文件第7页 
74AC11191  
SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTER  
SCAS105A – FEBRUARY 1990 – REVISED APRIL 1993  
DW OR N PACKAGE  
(TOP VIEW)  
•
•
Single Down/Up Count Control Line  
Look-Ahead Circuitry Enhances Speed of  
Cascaded Counters  
RCO  
D/U  
CLK  
A
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
Q
A
•
•
Fully Synchronous in Count Modes  
Q
B
Asynchronously Presettable with Load  
Control  
GND  
GND  
GND  
GND  
B
V
V
C
CC  
CC  
•
•
•
•
•
Flow-Through Architecture to Optimize  
PCB Layout  
Q
Q
D
CTEN  
LOAD  
C
D
Center-Pin V  
and GND Configurations to  
CC  
MAX/MIN  
Minimize High-Speed Switching Noise  
EPIC (Enhanced-Performance Implanted  
CMOS) 1- m Process  
500-mA Typical Latch-Up Immunity at  
125°C  
Package Options Include Plastic  
Small-Outline Packages and Standard  
Plastic 300-mil DIPs  
description  
The 74AC11191 is a synchronous, 4-bit binary reversible up/down counter. Synchronous counting operation  
is provided by clocking all flip-flops simultaneously so that the outputs change coincident with each other when  
instructed by the steering logic. This mode of operation eliminates the output counting spikes normally  
associated with asynchronous (ripple clock) counters.  
The outputs of the four flip-flops are triggered on a low-to-high-level transition of the clock input if the enable  
input (CTEN) is low. A high at CTEN inhibits counting. The direction of the count is determined by the level of  
the down/up (D/U) input. When D/U is low, the counter counts up and when D/U is high, it counts down.  
These counters feature a fully independent clock circuit. Changes at the control inputs (CTEN and D/U) that  
will modify the operating mode have no effect on the contents of the counter until clocking occurs. The function  
of the counter will be dictated solely by the condition meeting the stable setup and hold times.  
These counters are fully programmable; that is, the outputs may be preset to any number between 0 and 15  
by placing a low on the load input and entering the desired data at the data inputs. The outputs will change to  
agree with the data inputs independently of the level of the clock input. This feature allows the counter to be  
used as a modulo-N divider by simply modifying the count length with the preset inputs.  
Two outputs have been made available to perform the cascading function: ripple clock and maximum/minimum  
count. The latter output produces a high-level output pulse with a duration approximately equal to one complete  
cycle of the clock while the count is zero (all outputs low) counting down or maximum (15) counting up. The  
ripple-clock output (RCO) produces a low-level output pulse under those same conditions but only while the  
clock input is low. The counter can easily be cascaded by feeding the ripple clock output to the enable input  
of the succeeding counter if parallel clocking is used, or to the clock input if parallel enabling is used. The  
maximum/minimum count output can be used to accomplish look-ahead for high-speed operation.  
The 74AC11191 is characterized for operation from – 40°C to 85°C.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...10

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74AC11191N 替代型号

型号 品牌 替代类型 描述 数据表
74AC11191DW TI

功能相似

 Synchronous 4-Bit Up/Down Binary Counters 20-SOIC -40 to 85

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