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74HC165 PDF预览

74HC165

更新时间: 2024-04-09 19:01:20
品牌 Logo 应用领域
圣邦微 - SGMICRO /
页数 文件大小 规格书
7页 602K
描述
8-Bit Parallel-Load Shift Register

74HC165 数据手册

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74HC165  
8-Bit Parallel-Load Shift Register  
GENERAL DESCRIPTION  
FEATURES  
The 74HC165 is an 8-bit parallel-load shift register with  
a wide operating voltage range of 2.0V to 5.5V. When  
the shift/load input is LOW, eight parallel data inputs  
(A-H) are enabled and allowed to enter each stage.  
Data is shifted to a serial output when the device is  
clocked. The device also provides a complementary  
serial output.  
Wide Supply Voltage Range: 2.0V to 5.5V  
+5.2mA/-5.2mA Output Current  
Synchronous Serial Input  
CMOS Low Power Dissipation  
Data Transformation of Parallel-to-Serial  
-40to +125Operating Temperature Range  
Available in Green SOIC-16 and TSSOP-16  
Packages  
When the shift/load input is HIGH and the clock inhibit  
input is LOW, the clock transition can be completed by  
a LOW-to-HIGH transition of the clock input. Due to the  
interchangeable function of the clock input and the  
clock inhibit input, the clock transition also can be  
completed by a low level of the clock input and a  
LOW-to-HIGH transition of the clock inhibit input. When  
the shift/load input remains HIGH, parallel load is  
inhibited. When the shift/load input remains LOW,  
parallel inputs enter the register, independent of other  
inputs.  
APPLICATIONS  
Programmable Logic Controller  
System of Video Display  
Output Expander and Keyboard  
Appliance  
LOGIC DIAGRAM  
A
B, C, D, E, F  
12, 13, 14, 3, 4  
G
H
11  
5
6
1
SH/LD  
15  
2
CLK INH  
CLK  
9
7
S
C
D
R
S
C
D
R
S
C
D
R
QH  
QH  
10  
SER  
SG Micro Corp  
AUGUST 2023 – REV. A.1  
www.sg-micro.com  

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Not Recommended for New Design