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72V81L15PAGI PDF预览

72V81L15PAGI

更新时间： 2024-11-09 06:31:35
品牌 Logo 应用领域
艾迪悌 - IDT 存储内存集成电路光电二极管先进先出芯片时钟
页数 文件大小 规格书
12页 118K
描述
3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO DUAL 512 x 9, DUAL 1,024 x 9 DUAL 2,048 x 9, DUAL 4,096 X 9 DUAL 8,192 X 9

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72V81L15PAGI 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：ObsoleteReach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.32.00.71
风险等级：5.29Is Samacsys：N
最长访问时间：15 ns最大时钟频率 (fCLK)：40 MHz
JESD-30 代码：R-PDSO-G56JESD-609代码：e3
内存密度：9216 bit内存集成电路类型：OTHER FIFO
内存宽度：9湿度敏感等级：1
端子数量：56字数：1024 words
字数代码：1000工作模式：ASYNCHRONOUS
最高工作温度：85 °C最低工作温度：-40 °C
组织：1KX9封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP56,.3,20
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260电源：3.3 V
认证状态：Not Qualified最大待机电流：0.005 A
子类别：FIFOs最大压摆率：0.1 mA
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn) - annealed端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30Base Number Matches：1

72V81L15PAGI 数据手册

 浏览型号72V81L15PAGI的Datasheet PDF文件第2页浏览型号72V81L15PAGI的Datasheet PDF文件第3页浏览型号72V81L15PAGI的Datasheet PDF文件第4页浏览型号72V81L15PAGI的Datasheet PDF文件第5页浏览型号72V81L15PAGI的Datasheet PDF文件第6页浏览型号72V81L15PAGI的Datasheet PDF文件第7页 
IDT72V81  
IDT72V82  
IDT72V83  
IDT72V84  
IDT72V85  
3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO  
DUAL 512 x 9, DUAL 1,024 x 9  
DUAL 2,048 x 9, DUAL 4,096 X 9  
DUAL 8,192 X 9  
FEATURES:  
DESCRIPTION:  
•
•
•
•
•
•
The IDT72V81 is equivalent to two IDT72V01 - 512 x 9 FIFOs  
The IDT72V82 is equivalent to two IDT72V02 - 1,024 x 9 FIFOs  
The IDT72V83 is equivalent to two IDT72V03 - 2,048 x 9 FIFOs  
The IDT72V84 is equivalent to two IDT72V04 - 4,096 x 9 FIFOs  
The IDT72V85 is equivalent to two IDT72V05 - 8,192 x 9 FIFOs  
Low power consumption  
TheIDT72V81/72V82/72V83/72V84/72V85aredual-FIFOmemoriesthat  
loadandemptydataonafirst-in/first-outbasis.Thesedevicesarefunctionaland  
compatibletotwoIDT72V01/72V02/72V03/72V04/72V05FIFOsinasingle  
packagewithallassociatedcontrol,data,andflaglinesassignedtoseparate  
pins. The devices use Full and Empty flags to prevent data overflow and  
underflowandexpansionlogictoallowforunlimitedexpansioncapabilityinboth  
word size and depth.  
— Active: 330 mW (max.)  
— Power-down: 18 mW (max.)  
Ultra high speed—15 ns access time  
Asynchronous and simultaneous read and write  
Offers optimal combination of data capacity, small foot print  
and functional flexibility  
The reads and writes are internally sequential through the use of ring  
pointers,withnoaddressinformationrequiredtoloadandunloaddata. Data  
istoggledinandoutofthedevicesthroughtheuseoftheWrite(W)andRead  
(R) pins.  
•
•
•
The devices utilize a 9-bit wide data array to allow for control and parity  
•
Ideal for bidirectional, width expansion, depth expansion, bus- bitsattheuser’soption.Thisfeatureis especiallyusefulindatacommunications  
matching, and data sorting applications  
Status Flags: Empty, Half-Full, Full  
Auto-retransmit capability  
High-performance CEMOS™ technology  
Space-saving TSSOP package  
Industrial temperature range (–40°C to +85°C) is available  
Green parts available, see ordering information  
applicationswhereitisnecessarytouseaparitybitfortransmission/reception  
errorchecking.ItalsofeaturesaRetransmit(RT)capabilitythatallowsforreset  
of the read pointer to its initial position when RT is pulsed low to allow for  
retransmissionfromthebeginningofdata.AHalf-FullFlagisavailableinthe  
singledevicemodeandwidthexpansionmodes.  
These FIFOs are fabricated using IDT’s high-speed CMOS technology.  
Theyaredesignedforthoseapplicationsrequiringasynchronousandsimul-  
taneousread/writesinmultiprocessingandratebufferapplications.  
•
•
•
•
•
•
FUNCTIONAL BLOCK DIAGRAM  
DATA INPUTS  
DATA INPUTS  
(DA  
0
-DA  
8)  
RSA  
(DB  
0
-DB  
8)  
RSB  
WB  
WRITE  
CONTROL  
WRITE  
CONTROL  
WA  
RAM  
RAM  
ARRAY A  
512 x 9  
ARRAY A  
512 x 9  
1,024 x 9  
2,048 x 9  
4,096 x 9  
8,192 x 9  
1,024 x 9  
2,048 x 9  
4,096 x 9  
8,192 x 9  
WRITE  
POINTER  
WRITE  
POINTER  
READ  
POINTER  
READ  
POINTER  
THREE-  
STATE  
BUFFERS  
THREE-  
STATE  
BUFFERS  
READ  
CONTROL  
READ  
CONTROL  
RA  
RESET  
LOGIC  
RESET  
LOGIC  
FLAG  
LOGIC  
FLAG  
LOGIC  
EXPANSION  
LOGIC  
EXPANSION  
LOGIC  
XIA  
FFA EFA  
RB  
XIB  
XOA/HFA  
FLA/RTA  
FFB EFB  
FLB/RTB  
DATA  
XOB/HFB  
DATA  
OUTPUTS  
(QB0-QB8)  
OUTPUTS  
3966 drw 01  
(QA -QA8)  
0
IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc. TheAsyncFIFO™isatrademarkofIntegratedDeviceTechnology,Inc.  
FEBRUARY 2009  
COMMERICAL TEMPERATURE RANGE  
1
DSC-3966/3  
©
2009 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
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与72V81L15PAGI相关器件

型号 品牌 获取价格 描述 数据表
72V81L15PAGI8 IDT

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 		FIFO
72V81L15PAI IDT

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 		FIFO, 1KX9, 15ns, Asynchronous, CMOS, PDSO56
72V81L20PA IDT

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 		TSSOP-56, Tube
72V81L20PAG IDT

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 		3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO DUAL 512 x 9, DUAL 1,024 x 9 DUAL 2,048 x 9, DUAL 4,0
72V81L20PAG8 IDT

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 		3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO
72V81L20PAGI IDT

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 		3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO DUAL 512 x 9, DUAL 1,024 x 9 DUAL 2,048 x 9, DUAL 4,0
72V81L20PAGI8 IDT

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 		FIFO, 512X9, 20ns, Asynchronous, CMOS, PDSO56, GREEN, TSSOP-56
72V81L20PAI IDT

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 		TSSOP-56, Tube
72V81L20PAI8 IDT

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 		TSSOP-56, Reel
72V82 RENESAS

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 		1K x 9 DualAsync FIFO, 3.3V

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