Datasheet > 72V821L10PFGI8

72V821L10PFGI8

更新时间： 2024-11-07 00:53:23

品牌	Logo	应用领域
艾迪悌 - IDT		先进先出芯片
页数	文件大小	规格书
16页	166K
描述
3.3 VOLT DUAL CMOS SyncFIFO

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

72V821L10PFGI8 数据手册

IDT72V801

IDT72V811

IDT72V821

IDT72V831

IDT72V841

IDT72V851

3.3 VOLT DUAL CMOS SyncFIFO™

DUAL 256 X 9, DUAL 512 X 9,

DUAL 1,024 X 9, DUAL 2,048 X 9,

DUAL 4,096 X 9 , DUAL 8,192 X 9

FEATURES:

EachofthetwoFIFOs(designatedFIFOAandFIFOB)containedinthe

IDT72V801/72V811/72V821/72V831/72V841/72V851hasa9-bitinputdata

port (DA0 - DA8, DB0 - DB8) and a 9-bit output data port (QA0 - QA8,

QB0 - QB8). Each input port is controlled by a free-running clock (WCLKA,

WCLKB), and two Write Enable pins (WENA1, WENA2, WENB1, WENB2).

DataiswrittenintoeachofthetwoarraysoneveryrisingclockedgeoftheWrite

Clock (WCLKA, WCLKB) when the appropriate Write Enable pins are

asserted.

TheoutputportofeachFIFObankiscontrolledbyitsassociated clockpin

(RCLKA, RCLKB) and two Read Enable pins (RENA1, RENA2, RENB1,

RENB2).TheReadClockcanbetiedtotheWriteClockforsingleclockoperation

orthetwoclockscanrunasynchronousofoneanotherfordualclockoperation.

An Output Enable pin (OEA, OEB) is provided on the read port of each FIFO

forthree-stateoutputcontrol.

• The IDT72V801 is equivalent to two IDT72V201 256 x 9 FIFOs

• The IDT72V811 is equivalent to two IDT72V211 512 x 9 FIFOs

• The IDT72V821 is equivalent to two IDT72V221 1,024 x 9 FIFOs

• The IDT72V831 is equivalent to two IDT72V231 2,048 x 9 FIFOs

• The IDT72V841 is equivalent to two IDT72V241 4,096 x 9 FIFOs

• The IDT72V851 is equivalent to two IDT72V251 8,192 x 9 FIFOs

• Offers optimal combination of large capacity, high speed,

design flexibility and small footprint

• Ideal for prioritization, bidirectional, and width expansion

applications

• 10 ns read/write cycle time

• 5V input tolerant

• Separate control lines and data lines for each FIFO

• Separate Empty, Full, programmable Almost-Empty and

Almost-Full flags for each FIFO

• Enable puts output data lines in high-impedance state

• Space-saving 64-pin plastic Thin Quad Flat Pack (TQFP/

STQFP)

EachofthetwoFIFOshastwofixedflags,Empty(EFA,EFB)andFull(FFA,

FFB). Twoprogrammableflags,Almost-Empty(PAEA,PAEB)andAlmost-Full

(PAFA,PAFB),areprovidedforeachFIFObanktoimprovememoryutilization.

Ifnotprogrammed,theprogrammableflagsdefaulttoEmpty+7forPAEAand

PAEB, and Full-7 for PAFA and PAFB.

• Industrial temperature range (–40°C to +85°C) is available

• Green parts available, see ordering information

TheIDT72V801/72V811/72V821/72V831/72V841/72V851architecture

lendsitselftomanyflexibleconfigurationssuchas:

• 2-levelprioritydatabuffering

• Bidirectionaloperation

• Widthexpansion

• Depthexpansion

ThisFIFOisfabricatedusingIDT'shigh-performancesubmicronCMOS

technology.

DESCRIPTION:

TheIDT72V801/72V811/72V821/72V831/72V841/72V851/72V851are

dualsynchronous(clocked)FIFOs. Thedeviceisfunctionallyequivalentto

twoIDT72V201/72V211/72V221/72V231/72V241/72V251FIFOsinasingle

packagewithallassociatedcontrol,data,andflaglinesassignedtoseparate

pins.

FUNCTIONAL BLOCK DIAGRAM

EFA

PAEA

PAFA

FFA

WCLKB

WCLKA

WENA1

WENA2

WENB1

DA0 - DA8

DB0 - DB8

LDA

LDB

WENB2

INPUT REGISTER

OFFSET REGISTER

INPUT REGISTER

OFFSET REGISTER

EFB

FLAG

LOGIC

FLAG

LOGIC

WRITE CONTROL

LOGIC

WRITE CONTROL

LOGIC

PAEB

PAFB

FFB

RAM ARRAY

256 x 9, 512 x 9,

1,024 x 9, 2,048 x 9,

4,096 x 9, 8,192 x 9

RAM ARRAY

256 x 9, 512 x 9,

1,024 x 9, 2,048 x 9,

4,096 x 9, 8,192 x 9

WRITE POINTER

READ POINTER

WRITE POINTER

READ POINTER

READ CONTROL

LOGIC

READ CONTROL

LOGIC

OUTPUT REGISTER

RESET LOGIC

4093 drw 01

RCLKB

RENB1

RENB2

RSA

OEA

RSB

RCLKA

OEB

QB0 - QB8

QA0 - QA8

RENA1

RENA2

IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The TeraSync FIFO is a trademark of Integrated Device Technology, Inc.

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

NOVEMBER2014

DSC-4093/5

12 3 4 5 6 7...16

中文翻译

下载PDF

与72V821L10PFGI8相关器件

型号	品牌	获取价格	描述	数据表
72V821L10TFG	IDT	获取价格	Bi-Directional FIFO, 1KX9, 6.5ns, Synchronous, CMOS, PQFP64, GREEN, PLASTIC, STQFP-64
72V821L10TFG8	IDT	获取价格	FIFO, 1KX9, 6.5ns, Synchronous, CMOS, PQFP64, GREEN, PLASTIC, STQFP-64
72V821L10TFGI	IDT	获取价格	3.3 VOLT DUAL CMOS SyncFIFO
72V821L10TFGI8	IDT	获取价格	3.3 VOLT DUAL CMOS SyncFIFO
72V821L15PFG	IDT	获取价格	Bi-Directional FIFO, 1KX9, 10ns, Synchronous, CMOS, PQFP64, GREEN, PLASTIC, TQFP-64
72V821L15PFG8	IDT	获取价格	FIFO, 1KX9, 10ns, Synchronous, CMOS, PQFP64, GREEN, PLASTIC, TQFP-64
72V821L15PFGI	IDT	获取价格	Bi-Directional FIFO, 1KX9, 10ns, Synchronous, CMOS, PQFP64, GREEN, PLASTIC, TQFP-64
72V821L15PFGI8	IDT	获取价格	3.3 VOLT DUAL CMOS SyncFIFO
72V821L15PFI	IDT	获取价格	TQFP-64, Tray
72V821L15TFG	IDT	获取价格	Bi-Directional FIFO, 1KX9, 10ns, Synchronous, CMOS, PQFP64, GREEN, PLASTIC, STQFP-64

与72V821L10PFGI8相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

14
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

12
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

36
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

33

产品中心

服务支持

精选活动

关于我们

帮助中心

72V821L10PFGI8

72V821L10PFGI8 数据手册

与72V821L10PFGI8相关器件

与72V821L10PFGI8相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

72V821L10PFGI8

72V821L10PFGI8 数据手册

与72V821L10PFGI8相关器件

与72V821L10PFGI8相关文章

您还可以找

您在本页遇到什么问题？