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7200L25TDG PDF预览

7200L25TDG

更新时间: 2024-11-05 18:39:31
品牌 Logo 应用领域
艾迪悌 - IDT 时钟先进先出芯片内存集成电路
页数 文件大小 规格书
14页 305K
描述
FIFO, 256X9, 25ns, Asynchronous, CMOS, CDIP28

7200L25TDG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:ActiveReach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.81最长访问时间:25 ns
最大时钟频率 (fCLK):28.5 MHzJESD-30 代码:R-XDIP-T28
JESD-609代码:e3内存集成电路类型:OTHER FIFO
内存宽度:9端子数量:28
字数:256 words字数代码:256
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:256X9
封装主体材料:CERAMIC封装代码:DIP
封装等效代码:DIP28,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):225
电源:5 V认证状态:Not Qualified
最大待机电流:0.005 A子类别:FIFOs
最大压摆率:0.08 mA标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子面层:MATTE TIN
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:20
Base Number Matches:1

7200L25TDG 数据手册

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CMOS ASYNCHRONOUS FIFO  
256 x 9, 512 x 9 and 1,024 x 9  
IDT7200L  
IDT7201LA  
IDT7202LA  
Industrial temperature range (–40oC to +85oC) is available  
(plastic packages only)  
Green parts available, see ordering information  
FEATURES:  
First-In/First-Out dual-port memory  
256 x 9 organization (IDT7200)  
512 x 9 organization (IDT7201)  
1,024 x 9 organization (IDT7202)  
Low power consumption  
— Active: 440mW (max.)  
DESCRIPTION:  
TheIDT7200/7201/7202aredual-portmemoriesthatloadandemptydata  
onafirst-in/first-outbasis. ThedevicesuseFullandEmptyflagstopreventdata  
overflowandunderflowandexpansionlogictoallowforunlimitedexpansion  
capability in both word size and depth.  
—Power-down: 28mW (max.)  
Ultra high speed—12ns access time  
Asynchronous and simultaneous read and write  
Fully expandable by both word depth and/or bit width  
720x family is pin and functionally compatible from 256 x 9 to 64k x 9  
Status Flags: Empty, Half-Full, Full  
Auto-retransmit capability  
High-performance CEMOS™ technology  
Military product compliant to MIL-STD-883, Class B  
Standard Military Drawing #5962-87531, 5962-89666, 5962-89863  
and 5962-89536 are listed on this function  
Dual versions available in the TSSOP package. For more informa-  
tion, see IDT7280/7281/7282 data sheet  
IDT7280 = 2 x IDT7200  
The reads and writes are internally sequential through the use of ring  
pointers,withnoaddressinformationrequiredtoloadandunloaddata. Data  
istoggledinandoutofthedevicesthroughtheuseoftheWrite(W)andRead  
(R) pins.  
Thedevicesutilizea9-bitwidedataarraytoallowforcontrolandparitybits  
attheuser’soption. Thisfeatureisespeciallyusefulindatacommunications  
applicationswhereitisnecessarytouseaparitybitfortransmission/reception  
errorchecking. ItalsofeaturesaRetransmit(RT)capabilitythatallowsforreset  
of the read pointer to its initial position when RT is pulsed LOW to allow for  
retransmissionfromthebeginningofdata. AHalf-FullFlagisavailableinthe  
singledevicemodeandwidthexpansionmodes.  
TheseFIFOsarefabricatedusinghigh-speedCMOStechnology. They  
aredesignedforthoseapplicationsrequiringasynchronousandsimultaneous  
read/writes in multiprocessing and rate buffer applications. Military grade  
productismanufacturedincompliancewithMIL-STD-883,ClassB.  
IDT7281 = 2 x IDT7201  
IDT7282 = 2 x IDT7202  
FUNCTIONAL BLOCK DIAGRAM  
DATA INPUTS  
(D0-D8)  
WRITE  
CONTROL  
W
RAM  
ARRAY  
256 x 9  
WRITE  
POINTER  
READ  
POINTER  
512 x 9  
1,024 x 9  
THREE-  
STATE  
BUFFERS  
RS  
DATA OUTPUTS  
READ  
(Q0-Q8)  
RESET  
LOGIC  
R
CONTROL  
FLAG  
LOGIC  
EF  
FF  
FL/RT  
EXPANSION  
2679 drw 01  
XO/HF  
XI  
LOGIC  
IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc.  
JUNE 2012  
COMMERCIAL, INDUSTRIAL AND MILITARY TEMPERATURE RANGES  
1
©2012 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-2679/13  

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