Datasheet > XRT91L80

XRT91L80

更新时间： 2024-02-03 10:13:23

品牌	Logo	应用领域
艾科嘉 - EXAR		/
页数	文件大小	规格书
41页	271K
描述
2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER

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技术参数
数据手册

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XRT91L80 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
Reach Compliance Code：	unknown	风险等级：	5.81
JESD-609代码：	e3	端子面层：	Matte Tin (Sn)
Base Number Matches：	1

XRT91L80 数据手册

PRELIMINARY

2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER

XRT91L80

MARCH 2005

REV. P1.0.4

AUTORST pin can automatically recover from an

overflow condition. The operation of the device can

GENERAL DESCRIPTION

The XRT91L80 is a fully integrated SONET/SDH

transceiver for SONET OC-48 allowing the use of

Forward Error Correction (FEC) capability. The

transceiver includes an on-chip Clock Multiplier Unit

(CMU), which uses a high frequency Phase-Locked

Loop (PLL) to generate the high-speed transmit serial

clock from slower external clock references. It also

provides Clock and Data Recovery (CDR) functions

by synchronizing its on-chip Voltage Controlled

Oscillator (VCO) to the incoming serial data stream.

The chip provides serial-to-parallel and parallel-to-

serial converters and 4-bit LVDS system interfaces in

both receive and transmit directions. The transmit

section includes a 4x9 Elastic Buffer (FIFO) to absorb

any phase differences between the transmitter input

clock and the internally generated transmitter

reference clock. In the event of an overflow, an

internal FIFO control circuit outputs an OVERFLOW

indication. The FIFO under the control of the

be monitored by checking the status of the LOCKDET

and LOSDET output signals. An on-chip phase/

frequency detector and charge-pump offers the ability

to form a de-jittering PLL with an external VCXO that

can be used in loop timing mode to clean up the

recovered clock in the receive section.

APPLICATIONS

•

SONET/SDH-based Transmission Systems

Add/Drop Multiplexers

Cross Connect Equipment

ATM and Multi-Service Switches, Routers and

Switch/Routers

•

DSLAMS

SONET/SDH Test Equipment

DWDM Termination Equipment

IGURE 1. BLOCK

IAGRAM OF XRT91L80

OC-48 TRANSCEIVER

FIFO_RST

FIFO_AUTORST

TxDI0P/N

TxDI1P/N

TxDI2P/N

TxDI3P/N

PISO

(Parallel Input

Serial Output)

TXOP/N

Re-Timer

TxCLKIP/N

TXPCLKOP/N

TXCLKO16P/N

CMU

RLOOPP

TRITXCLKO16

DLOOP RLOOPS

RxDO0P/N

RxDO1P/N

RxDO2P/N

RxDO3P/N

SIPO

(Serial Input

Parallel Output)

CDR

RXIP/N

RxCLKP/N

RXCLK16P/N

DISRD

TRIRXD

TDO

TDI

TCK

TMS

TRST

PFD

& Charge Pump

Serial

Microprocessor

Hardware

Control

JTAG

Exar Corporation 48720 Kato Road, Fremont CA, 94538

•

(510) 668-7000

•

FAX (510) 668-7017

•

www.exar.com

12 3 4 5 6 7...41

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与XRT91L80相关器件

型号	品牌	获取价格	描述	数据表
XRT91L80_0507	EXAR	获取价格	2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L80IB	EXAR	获取价格	2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L80IB-F	EXAR	获取价格	Telecom IC
XRT91L81	EXAR	获取价格	2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L81IB	EXAR	获取价格	2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82	EXAR	获取价格	2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82IB	EXAR	获取价格	2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT94L31	EXAR	获取价格	3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER
XRT94L31_07	EXAR	获取价格	3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
XRT94L31IB	EXAR	获取价格	3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER

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