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XRT95L51 PDF预览

XRT95L51

更新时间: 2024-09-23 22:18:27
品牌 Logo 应用领域
艾科嘉 - EXAR 异步传输模式ATM
页数 文件大小 规格书
8页 123K
描述
OC-48 ATM UNI/POS/MAPPER IC

XRT95L51 数据手册

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PRELIMINARY  
XRT95L51  
OC-48 ATM UNI/POS/MAPPER IC  
JULY 2000  
REV. P1.0.1  
APPLICATIONS  
GENERAL DESCRIPTION  
Digital Cross Connect Systems  
ATM Switches  
The XRT95L51 is an ATM/PPP physical layer proces-  
sor with integrated SONET OC-48/STM-16 framing  
controller. ATM direct mapping and cell delineation  
are supported, as are PPP mapping and frame pro-  
cessing. The XRT95L51 contains an integral SONET  
framer which provides framing and error accumula-  
tion in accordance with ANSI/ITU-T specifications.  
The configuration of this device is done through inter-  
nal registers accessible via 8-bit parallel, memory  
mapped, microprocessor interface.  
Routers  
SONET/SDH Add Drop Multiplexers  
Multiplexers  
FEATURES  
Single chip for ATM UNI and Packet over SONET.  
Generates and terminates SONET section, line and  
path layers.  
The XRT95L51 provides full section, line and path  
overhead processing and supports scrambling/de-  
scrambling, alarm signal insertion/detection and bit  
interleaved parity processing.  
Provides SONET frame scrambling and descram-  
bling.  
Provides 32-bit data UTOPIA level II and III multi-  
PHY interface and POS-PHY interface.  
The SONET/SDH transmit and receive blocks are  
used to transmit/receive an OC-48c/STM-16c signal  
or compose and decompose four OC-12/12c sig-  
nals.The blocks operate at a peak internal clock  
speed of 77 MHz and support 32-bit internal data  
paths. The transmit and receive blocks are compliant  
with both SONET and SDH standards.  
8-bit microprocessor interface  
Includes ATM cell or PPP packet mapping  
Single +3.3V power supply with +5V input tolerance  
-40°C to +85°C Operating Temperature Range  
Available in a 388 pin PBGA package  
FIGURE 1. BLOCK DIAGRAM OF THE 95L51 OC-48 ATM UNI/POS/MAPPER IC  
Overhead  
Insertion Block  
Tx OC-12  
Mapper X4  
POH Generation  
& Insertion  
Microprocessor Interface  
7[8&ON  
7[8(1%/  
7[862&  
7[/&ON#.20  
7[/'$7$>48=3@#.20  
7[/357<#.20  
7[/)3#.20  
Tx ATM Cell  
Processor  
Scrambler  
POH Processor  
SOH Processor  
Tx Framer  
7[8&/$9  
7[8$''5>7=3@  
7[8'$7$>64=3@  
7[8357<  
7[3(23  
Tx Cell  
Buffer  
Parallel to Serial  
Tx XCVR I/F  
32  
32  
7[/567B/#.20  
7[/&ON2#.20  
Tx POS Cell  
Processor  
Tx Control  
Rx Control  
7[5()&ON  
7[3(55  
5[8&ON  
5[/&ON#.20  
5[/'$7$>48=3@#.20  
5[/357<#.20  
5[/)3#.20  
5[8(1B/  
5[862&  
Rx POS Cell  
Processor  
Rx Framer  
SOH Processor  
POH Processor  
Descrambler  
Serial to Parallel  
Rx XCVR I/F  
&
5[8&/$9  
5[8$''5>7=3@  
5[8'$7$>64=3@  
5[8357<  
5[3(23  
5[/&ON3#.20  
5[5()&ON  
Rx Cell  
Buffer  
Rx ATM Cell  
Processor  
Byte Align  
/26  
5[3(55  
5[3'9$/  
Overhead  
Extraction Block  
Rx OC-12  
MapperX4  
JTAG Test Port  
POH Extract & Interpret  
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com  

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