Datasheet > 电信电路 > ATM/SONET/SDH 集成电路> XRT94L43

XRT94L43

更新时间： 2024-02-02 14:37:41

品牌	Logo	应用领域
艾科嘉 - EXAR		/
页数	文件大小	规格书
7页	183K
描述
SONET/SDH STS-12/STM-4 TO E3/DS3/STS-1 MAPPER/DEMAPPER

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中文翻译

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技术参数
数据手册

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XRT94L43 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	BGA	包装说明：	BGA,
针数：	516	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	5.87
应用程序：	SONET;SDH	JESD-30 代码：	S-PBGA-B516
长度：	35 mm	湿度敏感等级：	1
功能数量：	1	端子数量：	516
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	BGA
封装形状：	SQUARE	封装形式：	GRID ARRAY
峰值回流温度（摄氏度）：	225	认证状态：	Not Qualified
座面最大高度：	2.7 mm	标称供电电压：	3.3 V
表面贴装：	YES	技术：	CMOS
电信集成电路类型：	ATM/SONET/SDH SUPPORT CIRCUIT	温度等级：	INDUSTRIAL
端子形式：	BALL	端子节距：	1.27 mm
端子位置：	BOTTOM	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	35 mm	Base Number Matches：	1

XRT94L43 数据手册

PRELIMINARY

XRT94L43

SONET/SDH STS-12/STM-4 TO E3/DS3/STS-1 MAPPER/DEMAPPER

SEPTEMBER 2001

REV. P1.0.0

FEATURES

GENERAL DESCRIPTION

• Provides DS3/ E3 mapping/de-mapping for up to 12

tributaries through SONET STS-1 or SDH AU-3

and/or TUG-3/AU-4 containers.

The XRT94L43 is a highly integrated SONET/SDH

terminator designed for E3/DS3/STS-1 mapping/de-

mapping functions from either the STS-12 or STM-4

data stream. The XRT94L43 interfaces to either STS-

12 or STM-4 signals using a byte wide parallel inter-

face in Telecom Bus format or via serial line interface

that operates at 622.08 MHz.

• Generates and terminates SONET/SDH sec-

tion,line and path layers.

• Integrated SERDES with Clock Recovery Circuit.

• Provides SONET frame scrambling and descram-

The XRT94L43 processes the section,line and path

overhead in the SONET/SDH data stream. The pro-

cessing of path overhead bytes within the STS-1s or

TUG-3s includes 64 bytes for storing the J1 bytes.

Path overhead bytes can be accessed through the

microprocessor interface or via serial interface.

bling.

• Integrated Clock Synthesizer that generates 622.08

MHz and 77.76 MHz clock from an external 12.96/

19.44/77.76 MHz reference clock.

• Provides STS-1 (EC1) mapping/de-mapping for up

to 12 STS-1s.

The XRT94L43 uses the internal E3/DS3 De-Syn-

chronizer circuit with an internal pointer leak algo-

rithm for clock smoothing as well as to remove the jit-

ter due to mapping and pointer movements. These

De-Synchronizer circuits do not need any external

clock reference for its operation.

• Integrated 12 E3/DS3/STS-1 De-Synchronizer cir-

cuit that de-jitter gapped clock to meet 0.05UIpp jit-

ter requirements.

• Access to Line or Section DCC

• Level 2 Performance Monitoring for E3 and DS3.

The SONET/SDH transmit blocks allow flexible inser-

tion of TOH and POH bytes through both Hardware

and Software. Individual POH bytes for the transmit-

ted SONET/SDH signal are mapped either from the

XRT94L43 memory map or from external interface.

A1,A2 framing pattern, C1 byte and H1,H2 pointer

byte are generated.

• Supports mixing of STS-1E and DS3 or E3 and

DS3 tributaries.

• Performs STS-3/STM-1 to STS-12/STM-4 Map-

ping/De-Mapping.

• E3 and DS3 framers for both Transmit and Receive

directions.

• Complete Transport/Section Overhead Processing

and generation per Telcordia and ITU standards.

The SONET/SDH receive blocks receive SONET

STS-3 signal or SDH STM-1 signal and perform the

necessary transport and path overhead processing.

• Complete Path Overhead processing and genera-

tion for one STS-12 or for 12 STS-1s

The XRT94L43 provides a line side APS (Automatic

Protection Switching) interface by offering redundant

receive serial interface to be switched at the frame

boundary.

• Full line APS support for redundancy applications.

• Loopback support for both SONET/SDH as well as

E3/DS3/STS-1.

• Boundary scan capability with JTAG IEEE 1149.1

• 8-bit microprocessor interface

The XRT94L43 provides 12 mappers for performing

STS-1/VC-3 to STS-1/DS3/E3 mapping function, one

for each STS-1/DS3/E3 framers.

• Power Supply 2.5 V for Core and 3.3 V for I/O

• -40°C to +85°C Operating Temperature Range

• Available in a 516 Ball PBGA package

A PRBS test pattern generation and detection is im-

plemented to measure the bit-error performance.

A general purpose microprocessor interface is includ-

ed for control, configuration and monitoring.

APPLICATIONS

• Network switches

• Add/Drop Multiplexer

• W-DCS Digital Cross Connect Systems

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com

12 3 4 5 6 7

中文翻译

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与XRT94L43相关器件

型号	品牌	获取价格	描述	数据表
XRT94L43_06	EXAR	获取价格	SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
XRT94L43A	EXAR	获取价格	SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
XRT94L43IB	EXAR	获取价格	SONET/SDH STS-12/STM-4 TO E3/DS3/STS-1 MAPPER/DEMAPPER
XRT94L55	EXAR	获取价格	SONET/SDH OC-48/STM-16, 4XOC-12/STM-4, 16XOC-
XRT94L55IV	EXAR	获取价格	SONET/SDH OC-48/STM-16, 4XOC-12/STM-4, 16XOC-
XRT95L34	EXAR	获取价格	OC-12/STM-4, QUAD OC-3/STM-1 POS/ATM FRAMER W
XRT95L34IV	EXAR	获取价格	OC-12/STM-4, QUAD OC-3/STM-1 POS/ATM FRAMER W
XRT95L51	EXAR	获取价格	OC-48 ATM UNI/POS/MAPPER IC
XRT95L51IB	EXAR	获取价格	OC-48 ATM UNI/POS/MAPPER IC
XRT95L53	EXAR	获取价格	OC-48 ETHERNET/SONET MULTI-SERVICE FRAMER PROCESSOR

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