PRELIMINARY
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO AND POWERSAVE
XR16M2751
JUNE 2007
P1.0.0
FEATURES
GENERAL DESCRIPTION
• 1.62 to 3.6 Volt Operation
1
The XR16M2751 (M2751) is a high performance
• Pin-to-pin compatible to Exar’s XR16V2751 in the
dual universal asynchronous receiver and transmitter
(UART) with 64 byte TX and RX FIFOs. The device
operates from 1.62 to 3.6 volts and is pin-to-pin and
software compatible to Exar’s XR16V2751. The
device includes 2 additional capabilities over the
XR16M2750: Intel and Motorola data bus selection
and a “PowerSave” mode to further reduce sleep
current to a minimum during sleep mode. It supports
the Exar’s enhanced features of programmable FIFO
trigger level and FIFO level counters, automatic
hardware (RTS/CTS) and software flow control,
automatic RS-485 half duplex direction control output
and a complete modem interface. An internal
loopback capability allows system diagnostics.
Independent programmable fractional baud rate
generators are provided in each channel to select
data rates up to 8 Mbps at 3.3 Volt and 8X sampling
clock. The M2751 is available in a 48-pin TQFP
package.
48-TQFP package
• Two independent UART channels
■ Register set identical to 16V2751
■ Data rate of up to 8 Mbps at 3.3 V, and 6.25
Mbps at 2.5 V and 4 Mbps at 1.8 V with 8X
sampling rate
■ Fractional Baud Rate Generator
■ Transmit and Receive FIFOs of 64 bytes
■ Programmable TX and RX FIFO Trigger Levels
■ Transmit and Receive FIFO Level Counters
■ Automatic Hardware (RTS/CTS) Flow Control
■ Selectable Auto RTS Flow Control Hysteresis
■ Automatic Software (Xon/Xoff) Flow Control
■ Automatic RS-485 Half-duplex Direction
Control Output via RTS#
■ Wireless Infrared (IrDA 1.0) Encoder/Decoder
■ Automatic sleep mode with wake-up interrupt
■ Full modem interface
NOTE: 1 Covered by U.S. Patent #5,649,122 and #5,949,787
APPLICATIONS
• PowerSave Feature reduces sleep current to 15
µA
• Portable Appliances
• Telecommunication Network Routers
• Ethernet Network Routers
• Cellular Data Devices
• Device Identification and Revision
• Crystal oscillator (up to 32MHz) or external clock
(up to 64MHz) input
• Factory Automation and Process Controls
• 48-TQFP package
FIGURE 1. XR16M2751 BLOCK DIAGRAM
1.62 to 3.6V VCC
GND
PwrSave
A2:A0
D7:D0
UART Channel A
IOR# (VCC)
TXA, RXA, DTRA#,
IOW# (R/W#)
64 Byte TX FIFO
UART
Regs
DSRA#, RTSA#,
DTSA#, CDA#, RIA#,
OP2A#
CSA# (CS#)
CSB# (A3)
IR
ENDEC
TX & RX
BRG
INTA (IRQ#)
INTB (logic 0)
64 Byte RX FIFO
TXB, RXB, DTRB#,
DSRB#, RTSB#,
CTSB#, CDB#, RIB#,
OP2B#
TXRDYA#
TXRDYB#
RXRDYA#
RXRDYB#
Intel or
UART Channel B
(same as Channel A)
Motorola
Data Bus
Interface
XTAL1
XTAL2
Reset (Reset#)
16/68#
Crystal Osc/Buffer
CLKSEL
HDCNTL#
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com