XR16M2751
1.62V TO 3.63V HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
AUGUST 2007
REV. 1.0.0
FEATURES
GENERAL DESCRIPTION
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1.62 to 3.63 Volt Operation
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The XR16M2751 (M2751) is a high performance
dual universal asynchronous receiver and transmitter
(UART) with 64 byte TX and RX FIFOs. The device
operates from 1.62 to 3.63 volts and is pin-to-pin and
software compatible to Exar’s XR16V2751. The
device includes 2 additional capabilities over the
XR16M2750: Intel and Motorola data bus selection
and a “PowerSave” mode to further reduce sleep
current to a minimum during sleep mode. It supports
the Exar’s enhanced features of programmable FIFO
trigger level and FIFO level counters, automatic
hardware (RTS/CTS) and software flow control,
automatic RS-485 half duplex direction control output
and a complete modem interface. An internal
loopback capability allows system diagnostics.
Independent programmable fractional baud rate
generators are provided in each channel to select
data rates up to 8 Mbps at 3.3 Volt and 8X sampling
clock. The M2751 is available in a 48-pin TQFP
package.
Pin-to-pin compatible to Exar’s XR16V2751 in the
48-TQFP package
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Two independent UART channels
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Data rate of up to 8 Mbps at 3.3 V
Data rate of up to 6.25 Mbps at 2.5 V
Data rate of up to 4 Mbps at 1.8 V
Fractional Baud Rate Generator
Transmit and Receive FIFOs of 64 bytes
Programmable TX and RX FIFO Trigger Levels
Transmit and Receive FIFO Level Counters
Automatic Hardware (RTS/CTS) Flow Control
Selectable Auto RTS Flow Control Hysteresis
Automatic Software (Xon/Xoff) Flow Control
Automatic RS-485 Half-duplex Direction
Control Output via RTS#
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Wireless Infrared (IrDA 1.0) Encoder/Decoder
Automatic sleep mode with wake-up interrupt
Full modem interface
N
OTE: 1 Covered by U.S. Patent #5,649,122 and #5,949,787
APPLICATIONS
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Portable Appliances
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PowerSave Feature reduces sleep current to 15 µA
Device Identification and Revision
Telecommunication Network Routers
Ethernet Network Routers
Crystal oscillator (up to 24MHz) or external clock
(up to 64MHz) input
Cellular Data Devices
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48-TQFP package
Factory Automation and Process Controls
F
IGURE 1. XR16M2751 BLOCK DIAGRAM
1.62 to 3.6V VCC
GND
PwrSave
A2:A0
D7:D0
UART Channel A
IOR# (VCC)
TXA, RXA, DTRA#,
DSRA#, RTSA#,
DTSA#, CDA#, RIA#,
OP2A#
IOW# (R/W#)
64 Byte TX FIFO
UART
Regs
CSA# (CS#)
CSB# (A3)
IR
ENDEC
TX & RX
BRG
INTA (IRQ#)
INTB (logic 0)
64 Byte RX FIFO
TXB, RXB, DTRB#,
DSRB#, RTSB#,
CTSB#, CDB#, RIB#,
OP2B#
TXRDYA#
TXRDYB#
RXRDYA#
RXRDYB#
Intel or
Motorola
Data Bus
Interface
UART Channel B
(same as Channel A)
XTAL1
XTAL2
Reset (Reset#)
16/68#
Crystal Osc/Buffer
CLKSEL
HDCNTL#
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com