XR16M2752
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
JUNE 2007
REV. P1.0.0
FEATURES
GENERAL DESCRIPTION
• 1.62 to 3.6 Volt Operation
1
The XR16M2752 (M2752) is a high performance
dual universal asynchronous receiver and transmitter
(UART) with 64 byte TX and RX FIFOs. The device
operates from 1.62 to 3.6 volts and is pin-to-pin
compatible to Exar’s ST16C2552, XR16L2552,
XR16L2752 and XR16V2752. The M2752 register set
is identical to the XR16V2752 and is compatible to
the ST16C2552 and the XR16C2852 enhanced
features. It supports the Exar’s enhanced features of
programmable FIFO trigger level and FIFO level
counters, automatic hardware (RTS/CTS) and
software flow control, automatic RS-485 half duplex
direction control output and a complete modem
interface. Onboard registers provide the user with
operational status and data error flags. An internal
loopback capability allows system diagnostics.
Independent programmable baud rate generators are
provided in each channel to select data rates up to 8
Mbps at 3.3 Volt and 8X sampling clock. The M2752
is available in 44-pin PLCC and 32-pin QFN
packages.
• Pin-to-pin compatible to Exar’s XR16L2752
• Two independent UART channels
■ Register set compatible to XR16L2752
■ Data rate of up to 8 Mbps at 3.3 V, 6.25 Mbps
at 2.5 V and 4 Mbps at 1.8 V with 8X sampling
rate
■ Fractional Baud Rate Generator
■ Transmit and Receive FIFOs of 64 bytes
■ Programmable TX and RX FIFO Trigger Levels
■ Transmit and Receive FIFO Level Counters
■ Automatic Hardware (RTS/CTS) Flow Control
■ Selectable Auto RTS Flow Control Hysteresis
■ Automatic Software (Xon/Xoff) Flow Control
■ Automatic RS-485 Half-duplex Direction
Control Output via RTS#
■ Wireless Infrared (IrDA 1.0) Encoder/Decoder
■ Automatic sleep mode
NOTE: 1 Covered by U.S. Patent #5,649,122
■ Full modem interface
APPLICATIONS
• Alternate Function Register
• Portable Appliances
• Device Identification and Revision
• Crystal oscillator or external clock input
• Telecommunication Network Routers
• Ethernet Network Routers
• Crystal oscillator (up to 32MHz) or external clock
(up to 64MHz) input
• Cellular Data Devices
• 44-PLCC and 32-QFN packages
• Factory Automation and Process Controls
FIGURE 1. XR16M2752 BLOCK DIAGRAM
1.62 V to 3.6 V VCC
GND
A2:A0
D7:D0
IOR#
UART Channel A
IOW#
CS#
CHSEL
TXA (or TXIRA)
64 Byte TX FIFO
IR
UART
Regs
TX & RX
ENDEC
INTA
INTB
BRG
64 Byte RX FIFO
RXA (or RXIRA)
8-bit Data
TXRDYA#
Bus
TXRDYB#
TXB (or TXIRB)
RXB (or RXIRB)
UART Channel B
(same as Channel A)
Interface
MFA#
(OP2A#,
BAUDOUTA#, or
RXRDYA#)
XTAL1
XTAL2
Crystal Osc/Buffer
MFB#
(OP2B#,
BAUDOUTB#, or
RXRDYB#)
CTS#A/B, RI#A/B,
CD#A/B, DSR#A/B
Modem Control Logic
Reset
DTR#A/B, RTS#A/B
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com