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XR16M554IV80-F PDF预览

XR16M554IV80-F

更新时间: 2024-11-22 20:11:19
品牌 Logo 应用领域
艾科嘉 - EXAR /
页数 文件大小 规格书
46页 346K
描述
Serial I/O Controller, CMOS, PQFP80,

XR16M554IV80-F 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:QFP, QFP80,.55SQ,20Reach Compliance Code:compliant
风险等级:5.79Base Number Matches:1

XR16M554IV80-F 数据手册

 浏览型号XR16M554IV80-F的Datasheet PDF文件第2页浏览型号XR16M554IV80-F的Datasheet PDF文件第3页浏览型号XR16M554IV80-F的Datasheet PDF文件第4页浏览型号XR16M554IV80-F的Datasheet PDF文件第5页浏览型号XR16M554IV80-F的Datasheet PDF文件第6页浏览型号XR16M554IV80-F的Datasheet PDF文件第7页 
XR16M554/554D  
1.62V TO 3.63V QUAD UART WITH 16-BYTE FIFO  
MAY 2008  
REV. 1.0.0  
FEATURES  
GENERAL DESCRIPTION  
Pin-to-pin compatible with ST16C454, ST16C554,  
TI’s TL16C554A and NXP’s SC16C554B  
The XR16M554 (M554) is  
a
quad Universal  
Asynchronous Receiver and Transmitter (UART) with  
16 bytes of transmit and receive FIFOs, selectable  
receive FIFO trigger levels and data rates of up to 4  
Mbps at 3.3 V. Each UART has a set of registers that  
provide the user with operating status and control,  
receiver error indications, and modem serial interface  
controls. An internal loopback capability allows  
onboard diagnostics. The M554 is available in a 48-  
pin QFN, 64-pin LQFP, 68-pin PLCC and 80-pin  
LQFP packages. The 64-pin and 80-pin packages  
only offer the 16 mode interface, but the 48- and 68-  
pin packages offer an additional 68 mode interface  
which allows easy integration with Motorola  
processors. The XR16M554IV (64-pin) offers three  
state interrupt output while the XR16M554DIV  
provides continuous interrupt output. The XR16M554  
is compatible with the industry standard ST16C554.  
Intel or Motorola Data Bus Interface select  
Four independent UART channels  
Register Set Compatible to 16C550  
Data rates of up to 4 Mbps at 3.3 V, 3.125  
Mbps at 2.5 V and 2 Mbps at 1.8 V  
16 byte Transmit FIFO  
16 byte Receive FIFO with error tags  
4 Selectable RX FIFO Trigger Levels  
Full modem interface  
1.62V to 3.63V supply operation  
Crystal oscillator or external clock input  
APPLICATIONS  
Portable Appliances  
Telecommunication Network Routers  
Ethernet Network Routers  
Cellular Data Devices  
Factory Automation and Process Controls  
F
IGURE 1. XR16M554 BLOCK  
D
IAGRAM  
1.62 V to 3.6 V VCC  
GND  
A2:A0  
D7:D0  
IOR#  
UART Channel A  
16 Byte TX FIFO  
UART  
Regs  
TXA, RXA, DTRA#,  
DSRA#, RTSA#, CTSA#,  
CDA#, RIA#  
IOW#  
CSA#  
CSB#  
TX & RX  
BRG  
16 Byte RX FIFO  
CSC#  
CSD#  
TXB, RXB, DTRB#,  
UART Channel B  
DSRB#, RTSB#, CTSB#,  
(same as Channel A)  
INTA  
Data Bus  
Interface  
CDB#, RIB#  
INTB  
INTC  
TXC, RXC, DTRC#,  
DSRC#, RTSC#, CTSC#,  
CDC#, RIC#  
UART Channel C  
(same as Channel A)  
INTD  
TXRDY#A-D  
RXRDY#A-D  
Reset  
TXD, RXD, DTRD#,  
DSRD#, RTSD#, CTSD#,  
CDD#, RID#  
UART Channel D  
(same as Channel A)  
16 68#  
/
XTAL1  
XTAL2  
Crystal Osc Buffer  
/
INTSEL  
554BLK  
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com  
 
 
 
 

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