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XR16M564IV80-F PDF预览

XR16M564IV80-F

更新时间: 2024-11-05 19:53:31
品牌 Logo 应用领域
艾科嘉 - EXAR 外围集成电路
页数 文件大小 规格书
55页 433K
描述
Serial I/O Controller, CMOS, PQFP80

XR16M564IV80-F 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:QFP, QFP80,.55SQ,20Reach Compliance Code:compliant
风险等级:5.81JESD-30 代码:S-PQFP-G80
JESD-609代码:e3端子数量:80
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP80,.55SQ,20封装形状:SQUARE
封装形式:FLATPACK电源:1.8/3.3 V
认证状态:Not Qualified子类别:Serial IO/Communication Controllers
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUADuPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches:1

XR16M564IV80-F 数据手册

 浏览型号XR16M564IV80-F的Datasheet PDF文件第2页浏览型号XR16M564IV80-F的Datasheet PDF文件第3页浏览型号XR16M564IV80-F的Datasheet PDF文件第4页浏览型号XR16M564IV80-F的Datasheet PDF文件第5页浏览型号XR16M564IV80-F的Datasheet PDF文件第6页浏览型号XR16M564IV80-F的Datasheet PDF文件第7页 
XR16M564/564D  
1.62V TO 3.63V QUAD UART WITH 32-BYTE FIFO  
MAY 2008  
REV. 1.0.0  
FEATURES  
GENERAL DESCRIPTION  
Pin-to-pin compatible with ST16C454, ST16C554,  
TI’s TL16C754B and NXP’s SC16C754B  
1
The XR16M564 (M564) is an enhanced quad  
Universal Asynchronous Receiver and Transmitter  
(UART) with 32 bytes of transmit and receive FIFOs,  
programmable transmit and receive FIFO trigger  
levels, automatic hardware and software flow control,  
and data rates of up to 16 Mbps at 4X sampling rate.  
Each UART has a set of registers that provide the  
user with operating status and control, receiver error  
indications, and modem serial interface controls. An  
internal loopback capability allows onboard  
diagnostics. The M564 is available in a 48-pin QFN,  
64-pin LQFP, 68-pin PLCC and 80-pin LQFP  
packages. The 64-pin and 80-pin packages only offer  
the 16 mode interface, but the 48 and 68 pin  
packages offer an additional 68 mode interface which  
allows easy integration with Motorola processors.  
The XR16M564IV (64-pin) offers three state interrupt  
output while the XR16M564DIV provides continuous  
interrupt output. The XR16M564 is compatible with  
the industry standard ST16C554 and ST16C654/  
654D.  
Intel or Motorola Data Bus Interface select  
Four independent UART channels  
Register Set Compatible to 16C550  
Data rates of up to 16 Mbps  
32 byte Transmit FIFO  
32 byte Receive FIFO with error tags  
4 Selectable TX and RX FIFO Trigger Levels  
Automatic Hardware (RTS/CTS) Flow Control  
Automatic Software (Xon/Xoff) Flow Control  
Programmable Xon/Xoff characters  
Wireless Infrared (IrDA 1.0) Encoder/Decoder  
Full modem interface  
1.62V to 3.63V supply operation  
Sleep Mode with automatic wake-up  
Crystal oscillator or external clock input  
NOTE: 1 Covered by U.S. Patent #5,649,122.  
APPLICATIONS  
Portable Appliances  
Telecommunication Network Routers  
Ethernet Network Routers  
Cellular Data Devices  
Factory Automation and Process Controls  
F
IGURE 1. XR16M564 BLOCK DIAGRAM  
1.62V to 3.6V VCC  
GND  
A2:A0  
D7:D0  
UART Channel A  
32 Byte TX FIFO  
IOR#  
IOW#  
CSA#  
CSB#  
UART  
Regs  
TXA, RXA, DTRA#,  
DSRA#, RTSA#, CTSA#,  
CDA#, RIA#  
IR  
TX & RX  
ENDEC  
BRG  
32 Byte RX FIFO  
CSC#  
CSD#  
TXB, RXB, DTRB#,  
DSRB#, RTSB#, CTSB#,  
CDB#, RIB#  
UART Channel B  
(same as Channel A)  
INTA  
INTB  
INTC  
Data Bus  
Interface  
TXC, RXC, DTRC#,  
DSRC#, RTSC#, CTSC#,  
CDC#, RIC#  
UART Channel C  
(same as Channel A)  
INTD  
TXRDY# A-D  
RXRDY# A-D  
Reset  
TXD, RXD, DTRD#,  
DSRD#, RTSD#, CTSD#,  
CDD#, RID#  
UART Channel D  
(same as Channel A)  
16/68#  
INTSEL  
CLKSEL  
XTAL1  
XTAL2  
Crystal Osc/Buffer  
564 BLK  
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com  
 
 
 
 

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