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XR16L78464-TQFP PDF预览

XR16L78464-TQFP

更新时间: 2024-11-06 22:41:15
品牌 Logo 应用领域
艾科嘉 - EXAR /
页数 文件大小 规格书
52页 587K
描述
HIGH PERFORMANCE 2.97V TO 5.5V QUAD UART

XR16L78464-TQFP 数据手册

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áç  
XR16L784  
HIGH PERFORMANCE 2.97V TO 5.5V QUAD UART  
JUNE 2004  
REV.1.2.0  
FEATURES  
GENERAL DESCRIPTION  
2.97V to 5.5V operation with 5V Tolerant Inputs  
8-bit Intel or Motorola Data Bus Interface  
Single Open Drain Interrupt output for all 4 channels  
Global Interrupt Source Registers for all channels  
5G (Fifth Generation) “Flat” Register Set  
Each UART is Independently Controlled with:  
16C550 Compatible Registers  
The XR16L7841 (784) is  
Asynchronous Receiver and Transmitter (UART). The  
device is designed for high bandwidth requirement in  
communication systems. The global interrupt source  
a
quad Universal  
register provides  
a
complete interrupt status  
indication for all 4 channels to speed up interrupt  
parsing. Each UART has its own 16C550 compatible  
set of configuration registers, transmit and receive  
FIFOs of 64 bytes, fully programmable transmit and  
receive FIFO level triggers, transmit and receive  
FIFO level counters, automatic RTS/CTS or DTR/  
DSR hardware flow control with programmable  
hysteresis, automatic software (Xon/Xoff) flow  
control, IrDA (Infrared Data Association) encoder/  
decoder, and a 16-bit general purpose timer/counter.  
64-byte Transmit and Receive FIFOs  
Transmit and Receive FIFO Level Counters  
Programmable TX and RX FIFO Trigger Levels  
Automatic RTS/CTS or DTR/DSR Flow Control  
Selectable RTS Flow Control Hysteresis  
Automatic Xon/Xoff Software Flow Control  
NOTE: 1 Covered by U.S. Patents #5,649,122 and #5,949,787  
APPLICATIONS  
Automatic RS485 Half-duplex Control Output with  
16 Selectable Turn-around Delay  
Remote Access Servers  
Infrared (IrDA 1.1) Data Encoder/Decoder  
Programmable Data Rate with Prescaler  
Up to 3.12 (16x) and 6.25 (8x) Mbps Data Rate  
A General Purpose 16-bit Timer/Counter  
Sleep Mode with Automatic Wake-up Indicator  
64-pin TQFP Package (10x10x1.4 mm)  
Ethernet Network to Serial Ports  
Network Management  
Factory Automation and Process Control  
Point-of-Sale Systems  
Multi-port RS-232/RS-422/RS-485 Cards  
FIGURE 1. BLOCK DIAGRAM  
2.97V to 5.5V VCC  
GND  
*All Inputs are 5V Tolerant  
(Except XTAL1)  
UART Channel 0  
64 Byte TX FIFO  
UART  
TX0, RX0, DTR0#,  
DSR0#, RTS0#,  
CTS0#, CD0#, RI0#  
A7:A0  
Regs  
TX &  
RX  
IR  
ENDEC  
D7:D0  
BRG  
Device  
64 Byte RX FIFO  
IOR#  
Configuration  
Register  
s
Intel or  
Motorola  
Data  
Bus  
Interface  
IOW#  
CS#  
UART Channel 1  
UART Channel 2  
UART Channel 3  
INT#  
16/68#  
RST#  
ENIR  
TX3, RX3, DTR3#,  
DSR3#, RTS3#,  
CTS3#, CD3#, RI3#  
16-bit  
Timer/Counter  
Crystal Osc/  
Buffer  
XTAL1  
XTAL2  
TMRCK  
784BLK  
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com  

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