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X9C503ST2

更新时间： 2024-09-18 14:28:43
品牌 Logo 应用领域
瑞萨 - RENESAS 光电二极管转换器
页数 文件大小 规格书
12页 634K
描述
X9C503ST2

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中文翻译

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X9C503ST2 技术参数

是否无铅：含铅是否Rohs认证：不符合
生命周期：Obsolete零件包装代码：SOIC
针数：8Reach Compliance Code：not_compliant
风险等级：5.8Is Samacsys：N
转换器类型：DIGITAL POTENTIOMETERJESD-30 代码：R-PDSO-G8
JESD-609代码：e0湿度敏感等级：1
端子数量：8最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP8,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
电源：5 V认证状态：Not Qualified
子类别：Digital Potentiometers标称供电电压：5 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUALBase Number Matches：1

X9C503ST2 数据手册

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DATASHEET  
X9C102, X9C103, X9C104, X9C503  
Digitally Controlled Potentiometer (XDCP™)  
FN8222  
Rev 4.00  
Jan 11, 2019  
The X9C102, X9C103, X9C104, X9C503 are digitally  
controlled (XDCP) potentiometers. The device consists of a  
resistor array, wiper switches, a control section, and  
nonvolatile memory. The wiper position is controlled by a  
three-wire interface.  
Features  
• Solid-State Potentiometer  
• Three-Wire Serial Interface  
• 100 Wiper Tap Points  
The potentiometer is implemented by a resistor array  
composed of 99 resistive elements and a wiper switching  
network. Between each element and at either end are tap  
points accessible to the wiper terminal. The position of the  
wiper element is controlled by the CS, U/D, and INC inputs.  
The position of the wiper can be stored in non-volatile  
memory and then be recalled upon a subsequent power-up  
operation.  
- Wiper Position Stored in Non-volatile Memory and  
Recalled on Power-up  
• 99 Resistive Elements  
- Temperature Compensated  
- End-to-End Resistance, ±20%  
- Terminal Voltages, ±5V  
• Low Power CMOS  
- VCC = 5V  
The device can be used as a three-terminal potentiometer or  
as a two-terminal variable resistor in a wide variety of  
applications ranging from control to signal processing to  
parameter adjustment.  
- Active Current, 3mA max.  
- Standby Current, 750µA max.  
• High Reliability  
Pinout  
- Endurance, 100,000 Data Changes per Bit  
- Register Data Retention, 100 years  
X9C102, X9C103, X9C104, X9C503  
(8 LD SOIC, 8 LD PDIP)  
TOP VIEW  
• X9C102 = 1k  
• X9C103 = 10k  
• X9C503 = 50k  
• X9C104 = 100k  
INC  
U/D  
V
CC  
1
2
3
4
8
7
6
5
CS  
V /R  
L
V /R  
L
H
H
V
V
/R  
W
• Packages  
- 8 Ld SOIC  
- 8 Ld PDIP  
SS  
W
• Pb-Free Available (RoHS Compliant)  
Block Diagram  
U/D  
INC  
CS  
7-BIT  
UP/DOWN  
COUNTER  
99  
R
V
H
H/  
98  
97  
96  
V
(SUPPLY VOLTAGE)  
CC  
7-BIT  
V /R  
H
H
UP/DOWN (U/D)  
INCREMENT (INC)  
NON-VOLATILE  
MEMORY  
ONE  
OF  
CONTROL  
AND  
MEMORY  
R
/V  
W
W
ONE-  
HUNDRED  
DECODER  
RESISTOR  
ARRAY  
TRANSFER  
GATES  
DEVICE  
SELECT  
(CS)  
V /R  
L
L
2
1
0
V
(GROUND)  
SS  
STORE AND  
RECALL  
CONTROL  
CIRCUITRY  
GENERAL  
V
CC  
GND  
R /V  
L
L
R
/V  
W
DETAILED  
W
FN8222 Rev 4.00  
Jan 11, 2019  
Page 1 of 12  
1234567...12

中文翻译

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