5秒后页面跳转
X24C01SMG-3 PDF预览

X24C01SMG-3

更新时间: 2024-02-01 23:45:33
品牌 Logo 应用领域
ICMIC 可编程只读存储器
页数 文件大小 规格书
14页 275K
描述
Serial E2PROM

X24C01SMG-3 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:unknownECCN代码:3A001.A.2.C
HTS代码:8542.32.00.51风险等级:5.78
最大时钟频率 (fCLK):0.1 MHzJESD-30 代码:R-PDSO-G8
长度:4.89 mm内存密度:1024 bit
内存集成电路类型:EEPROM内存宽度:8
功能数量:1端子数量:8
字数:128 words字数代码:128
工作模式:SYNCHRONOUS最高工作温度:125 °C
最低工作温度:-55 °C组织:128X8
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:SERIAL峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:1.75 mm
串行总线类型:I2C最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
最长写入周期时间 (tWC):10 msBase Number Matches:1

X24C01SMG-3 数据手册

 浏览型号X24C01SMG-3的Datasheet PDF文件第1页浏览型号X24C01SMG-3的Datasheet PDF文件第2页浏览型号X24C01SMG-3的Datasheet PDF文件第3页浏览型号X24C01SMG-3的Datasheet PDF文件第5页浏览型号X24C01SMG-3的Datasheet PDF文件第6页浏览型号X24C01SMG-3的Datasheet PDF文件第7页 
X24C01  
The X24C01 will respond with an acknowledge after  
recognition of a start condition, a seven bit word address  
Stop Condition  
All communications must be terminated by a stop con-  
dition, which is a LOW to HIGH transition of SDA when  
and a R/W bit. If a write operation has been selected, the  
X24C01 will respond with an acknowledge after each  
byte of data is received.  
SCL is HIGH. The stop condition is also used by the  
X24C01 to place the device in the standby power mode  
after a read sequence. A stop condition can only be  
issued after the transmitting device has released the bus.  
In the read mode the X24C01 will transmit eight bits of data,  
release the SDA line and monitor the line for an  
acknowledge. If an acknowledge is detected and no  
stop condition is generated by the master, the X24C01  
Acknowledge  
Acknowledge is a software convention used to indicate  
successful data transfers. The transmitting device will  
will continue to transmit data. If an acknowledge is not  
detected, the X24C01 will terminate further data trans-  
release the bus after transmitting eight bits. During the ninth  
clock cycle the receiver will pull the SDA line LOW  
missions. The master must then issue a stop condition to  
return the X24C01 to the standby power mode and  
to acknowledge that it received the eight bits of data.  
Refer to Figure 3.  
place the device into a known state.  
Figure 2. Definition of Start and Stop  
SCL  
SDA  
START CONDITION  
STOP CONDITION  
3837 FHD F07  
Figure 3. Acknowledge Response From Receiver  
SCL FROM  
MASTER  
1
8
9
DATA  
OUTPUT  
FROM  
TRANSMITTER  
DATA  
OUTPUT  
FROM  
RECEIVER  
START  
ACKNOWLEDGE  
3837 FHD F08  
4

与X24C01SMG-3相关器件

型号 品牌 获取价格 描述 数据表
X24C01SMG-3.5 ICMIC

获取价格

Serial E2PROM
X24C01SMT1 XICOR

获取价格

EEPROM, 128X8, Serial, CMOS, PDSO8, PLASTIC, SOIC-8
X24C01SMT2 XICOR

获取价格

EEPROM, 128X8, Serial, CMOS, PDSO8, PLASTIC, SOIC-8
X24C02 ICMIC

获取价格

Serial E2PROM
X24C02B ICMIC

获取价格

Serial E2PROM
X24C02BG ICMIC

获取价格

Serial E2PROM
X24C02BM ICMIC

获取价格

Serial E2PROM
X24C02BP ICMIC

获取价格

Serial E2PROM
X24C02BS8 ICMIC

获取价格

Serial E2PROM
X24C02C ICMIC

获取价格

Serial E2PROM