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X24128S14-2.5T1 PDF预览

X24128S14-2.5T1

更新时间: 2024-11-26 20:05:19
品牌 Logo 应用领域
XICOR 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
页数 文件大小 规格书
16页 142K
描述
EEPROM, 16KX8, Serial, CMOS, PDSO14, PLASTIC, SOIC-14

X24128S14-2.5T1 技术参数

生命周期:Obsolete包装说明:SOP,
Reach Compliance Code:unknown风险等级:5.84
其他特性:100000 ENDURANCE CYCLES; 100 YEARS DATA RETENTION最大时钟频率 (fCLK):0.4 MHz
数据保留时间-最小值:100耐久性:100000 Write/Erase Cycles
JESD-30 代码:R-PDSO-G14长度:8.65 mm
内存密度:131072 bit内存集成电路类型:EEPROM
内存宽度:8功能数量:1
端子数量:14字数:16384 words
字数代码:16000工作模式:SYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:16KX8输出特性:OPEN-DRAIN
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:SERIAL认证状态:Not Qualified
座面最大高度:1.75 mm串行总线类型:I2C
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2.5 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:3.9 mm
最长写入周期时间 (tWC):10 msBase Number Matches:1

X24128S14-2.5T1 数据手册

 浏览型号X24128S14-2.5T1的Datasheet PDF文件第2页浏览型号X24128S14-2.5T1的Datasheet PDF文件第3页浏览型号X24128S14-2.5T1的Datasheet PDF文件第4页浏览型号X24128S14-2.5T1的Datasheet PDF文件第5页浏览型号X24128S14-2.5T1的Datasheet PDF文件第6页浏览型号X24128S14-2.5T1的Datasheet PDF文件第7页 
Recommended System Management  
Alternative: X4283  
128K  
16K x 8 Bit  
X24128  
400kHz 2-Wire Serial EEPROM with Block Lock™  
DESCRIPTION  
FEATURES  
• Save critical data with programmable block lock  
protection  
—Block lock (0, 1/4, 1/2, or all of EEPROM array)  
—Software write protection  
The X24128 is a CMOS Serial EEPROM, internally  
organized 16K x 8. The device features a serial inter-  
face and software protocol allowing operation on a  
simple two wire bus.  
—Programmable hardware write protect  
• In circuit programmable ROM mode  
• 400kHz 2-wire serial interface  
—Schmitt trigger input noise suppression  
—Output slope control for ground bounce noise  
elimination  
• Longer battery life with lower power  
—Active read current less than 1mA  
—Active write current less than 3mA  
—Standby current less than 1µA  
• 2.5V to 5.5V power supply version  
• 32 word page write mode  
—Minimizes total write time per word  
• Internally organized 16K x 8  
• Bidirectional data transfer protocol  
• Self-timed write cycle  
Typical write cycle time of 5ms  
• High reliability  
Three device select inputs (S –S ) allow up to eight  
devices to share a common two wire bus.  
0
2
A Write Protect Register at the highest address location,  
FFFFh, provides three write protection features: Soft-  
ware Write Protect, Block Lock Protect, and Program-  
mable Hardware Write Protect. The software write  
protect feature prevents any nonvolatile writes to the  
device until the WEL bit in the write protect register is  
set. The Block Lock protection feature gives the user  
four array block protect options, set by programming two  
bits in the write protect register. The programmable  
hardware write protect feature allows the user to install  
the device with WP tied to V , write to and Block Lock  
CC  
the desired portions of the memory array in circuit, and  
then enable the In Circuit Programmable ROM Mode by  
programming the WPEN bit HIGH in the Write Protect  
Register. After this, the Block Locked portions of the  
array, including the Write Protect Register itself, are per-  
manently protected from being erased.  
—Endurance: 100,000 cycles  
—Data retention: 100 years  
• 8-lead XBGA  
Xicor EEPROMs are designed and tested for applica-  
tions requiring extended endurance. Inherent data  
retention is greater than 100 years.  
• 14-lead SOIC  
BLOCK DIAGRAM  
Data Register  
Serial EEPROM Data  
and Address (SDA)  
Y Decode Logic  
Command  
Serial Eeprom  
Array  
Page  
Decode  
Logic  
SCL  
Decode  
16k X 8  
and  
Control  
Logic  
4k X 8  
4k X 8  
Block Lock and  
Write Protect  
Control Logic  
S
S
S
2
1
0
Write  
Protect  
Register  
Device  
Select  
Logic  
8k X 8  
Write Voltage  
Control  
WP  
Characteristics subject to change without notice. 1 of 16  
REV 1.1 9/8/00  
www.xicor.com  

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