W39L040A Data Sheet
512K × 8 CMOS FLASH MEMORY
Table of Contents-
1.
2.
3.
4.
5.
6.
GENERAL DESCRIPTION ......................................................................................................... 3
FEATURES................................................................................................................................. 3
PIN CONFIGURATIONS ............................................................................................................ 4
BLOCK DIAGRAM ...................................................................................................................... 4
PIN DESCRIPTION..................................................................................................................... 4
FUNCTIONAL DESCRIPTION ................................................................................................... 5
6.1
Device Bus Operation..................................................................................................... 5
6.1.1 Read Mode.......................................................................................................................5
6.1.2 Write Mode.......................................................................................................................5
6.1.3 Standby Mode ..................................................................................................................5
6.1.4 Output Disable Mode........................................................................................................5
6.1.5 Auto-select Mode..............................................................................................................5
6.2
6.3
Data Protection............................................................................................................... 6
6.2.1 Low VDD Inhibit................................................................................................................6
6.2.2 Write Pulse "Glitch" Protection .........................................................................................6
6.2.3 Logical Inhibit ...................................................................................................................6
6.2.4 Power-up Write and Read Inhibit......................................................................................6
Command Definitions ..................................................................................................... 6
6.3.1 Read Command ...............................................................................................................6
6.3.2 Auto-select Command......................................................................................................7
6.3.3 Byte Program Command..................................................................................................7
6.3.4 Chip Erase Command ......................................................................................................7
6.3.5 Sector Erase Command ...................................................................................................8
6.4
6.5
Write Operation Status ................................................................................................... 8
6.4.1 DQ7: #Data Polling...........................................................................................................8
6.4.2 DQ6: Toggle Bit................................................................................................................9
Table of Operating Modes .............................................................................................. 9
6.5.1 Device Bus Operations.....................................................................................................9
6.5.2 Auto-select Codes (High Voltage Method) .......................................................................9
6.5.3 Sector Address Table.....................................................................................................10
6.5.4 Command Definitions .....................................................................................................10
6.6
6.7
Embedded Programming Algorithm ............................................................................. 11
Embedded Erase Algorithm.......................................................................................... 12
Publication Release Date:April 14, 2005
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Revision A3