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W29C022S-12B PDF预览

W29C022S-12B

更新时间: 2024-11-10 14:45:35
品牌 Logo 应用领域
华邦 - WINBOND 光电二极管内存集成电路
页数 文件大小 规格书
21页 303K
描述
Flash, 256KX8, 120ns, PDSO32, 0.450 INCH, SOP-32

W29C022S-12B 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:0.450 INCH, SOP-32针数:32
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.8
Is Samacsys:N最长访问时间:120 ns
启动块:BOTTOM/TOPJESD-30 代码:R-PDSO-G32
长度:20.45 mm内存密度:2097152 bit
内存集成电路类型:FLASH内存宽度:8
功能数量:1端子数量:32
字数:262144 words字数代码:256000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:256KX8
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL编程电压:5 V
认证状态:Not Qualified座面最大高度:3 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL类型:NOR TYPE
宽度:11.3 mm最长写入周期时间 (tWC):10 ms
Base Number Matches:1

W29C022S-12B 数据手册

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W29C022  
´ 8 CMOS FLASH MEMORY  
256K  
GENERAL DESCRIPTION  
The W29C022 is a 2-megabit, 5-volt only CMOS flash memory organized as 256K ´ 8 bits. The device  
can be written (erased and programmed) in-system with a standard 5V power supply. A 12-volt VPP is  
not required. The unique cell architecture of the W29C022 results in fast write (erase/ program)  
operations with extremely low current consumption compared to other comparable 5-volt flash memory  
products. The device can also be written (erased and programmed) by using standard EPROM  
programmers.  
FEATURES  
· Single 5-volt write (erase and program)  
operations  
· Software and hardware data protection  
· Low power consumption  
· Fast page-write operations  
- 128 bytes per page  
- Active current: 25 mA (typ.)  
- Standby current: 20 mA (typ.)  
- Page write (erase/program) cycle: 10 mS  
(max.)  
· Automatic write (erase/program) timing with  
internal VPP generation  
- Effective byte-write (erase/program) cycle  
time: 39 mS  
· End of write (erase/program) detection  
- Toggle bit  
- Optional software-protected data write  
· Fast chip-erase operation: 50 mS  
· Two 8 KB boot blocks with lockout  
- Data polling  
· Latched address and data  
· All inputs and outputs directly TTL compatible  
· JEDEC standard byte-wide pinouts  
· Typical page write (erase/program) cycles:  
1K/10K  
· Available packages: 32-pin 600 mil DIP,  
450 mil SOP, TSOP, and 32-pin PLCC  
· Read access time: 70/90/120 nS  
· Ten-year data retention  
Publication Release Date: April 2001  
- 1 -  
Revision A2  

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