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VSC8024XX PDF预览

VSC8024XX

更新时间: 2024-11-11 19:51:07
品牌 Logo 应用领域
美高森美 - MICROSEMI ATM异步传输模式电信电信集成电路
页数 文件大小 规格书
40页 297K
描述
Mux/Demux, 1-Func, CMOS, PBGA192, TBGA-192

VSC8024XX 技术参数

生命周期:Contact Manufacturer包装说明:BGA,
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.82JESD-30 代码:S-PBGA-B192
长度:21 mm功能数量:1
端子数量:192封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装形状:SQUARE
封装形式:GRID ARRAY认证状态:Not Qualified
标称供电电压:3.3 V表面贴装:YES
技术:CMOS电信集成电路类型:ATM/SONET/SDH MUX/DEMUX
端子形式:BALL端子节距:1.27 mm
端子位置:BOTTOM宽度:21 mm
Base Number Matches:1

VSC8024XX 数据手册

 浏览型号VSC8024XX的Datasheet PDF文件第2页浏览型号VSC8024XX的Datasheet PDF文件第3页浏览型号VSC8024XX的Datasheet PDF文件第4页浏览型号VSC8024XX的Datasheet PDF文件第5页浏览型号VSC8024XX的Datasheet PDF文件第6页浏览型号VSC8024XX的Datasheet PDF文件第7页 
VITESSE  
SEMICONDUCTOR CORPORATION  
Datasheet  
2.488 Gb/s ATM/SDH/SONET STM-16/STS-48  
Mux/Demux and Section Terminator IC Chipset  
VSC8023/VSC8024  
Features  
VSC8024 (DEMUX)  
VSC8023 (MUX)  
• SDH/SONET compliant demultiplexing of  
one serial STM-16/STS-48 data stream into  
four byte-wide STM-4/STS-12 data streams  
• SDH/SONET compliant multiplexing of four  
byte-wide STM-4/STS-12 data streams into one  
serial STM-16/STS-48 data stream  
• Frame Acquisition  
• Frame Synchronous Scrambling (optional)  
• B1 Calculation and Insertion (optional)  
• J0/Z0 Section-Trace Insertion (optional)  
• Supports Contra- & Co-directional Timing  
• Supports STS-48c Multiplexing  
• Frame Synchronous Descrambling (optional)  
• B1 Error Reporting  
• SEF/LOF Alarm Generation  
• Supports STS-48c Demultiplexing  
• Provides Equipment And Facility Loopbacks  
• Dual Supply Operation -2, +3.3 Volts  
• 192 TBGA Package  
• Provides Equipment And Facility Loopbacks  
• Dual Supply Operation -2, +3.3 Volts  
• 192 TBGA Package  
System Block Diagram  
PMC-Sierra  
PM5312/  
PM5355  
PMC-Sierra  
PM5312/  
PM5355  
PMC-Sierra  
PM5312/  
PM5355  
PMC-Sierra  
PM5312/  
PM5355  
2.488 GHz  
CRU  
VITESSE  
VSC8023  
VITESSE  
VSC8024  
PMC-Sierra  
PM5312/  
PM5355  
PMC-Sierra  
PM5312/  
PM5355  
E
E
O
O
PMC-Sierra  
PM5312/  
PM5355  
PMC-Sierra  
PM5312/  
PM5355  
2.488 GHz  
CMU  
STM-1/STS-3  
STM-1/STS-3  
STM-16/STS-48  
2.488 Gb/s  
or  
or  
ATM/UNI  
Interface  
ATM/UNI  
Interface  
General Description  
The VSC8023/VSC8024 chipset is designed to provide a SDH/SONET compliant interface between the  
PM5312 STTX (STM-1/STS-3 to STM-3/STS-12 mux/demux) or the PM5355 S/UNI-622 User Network Inter-  
face device and a SDH/SONET compliant 2.488 Gb/s interface, as depicted in the system block diagram above.  
This chipset allows one to create an ATM-UNI or STM-1/STS-3 to STM-16/STS-48 link. Both the mux  
(VSC8023) and the demux (VSC8024) are packaged in a 192 TBGA for optimum high-speed package perfor-  
mance. The VSC8023/VSC8024 chipset provides an integrated solution for ATM physical layers, SDH/SONET  
transmission systems, digital-video distribution systems, and SDH/SONET test equipment.  
G52129-0, Rev. 4.0  
5/20/98  
VITESSE SEMICONDUCTOR CORPORATION  
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896  
Page 1  

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