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VSC8072BAL PDF预览

VSC8072BAL

更新时间: 2024-11-10 23:45:19
品牌 Logo 应用领域
其他 - ETC 光电电信集成电路异步传输模式ATM
页数 文件大小 规格书
14页 200K
描述
Optoelectronic

VSC8072BAL 数据手册

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VITESSE  
SEMICONDUCTOR CORPORATION  
Datasheet  
10Gb/s 16-Bit Demultiplexer for  
STS-192 and STM-64 Applications  
VSC8074  
Features  
• Internal Input Terminations  
• Performs 1:16 DEMUX Between 10Gb/s High-  
Speed Signal and 16 622Mb/s Low-Speed Signals  
• Fully Differential Low-Speed Interface  
• Industry Standard –5.2V Power Supply  
• 50Output Drive Capability  
• Industry-Standard 80-Pin PQFP Package  
• Proven E/D Mode GaAs Technology  
• Supports STS-192 SONET Applications  
Typical System Block Diagram  
PU PD  
Q0 - Q15±  
DI±  
D0 - D15±  
DOUT±  
Frame  
Processor  
Frame  
Processor  
E/O  
VSC8073  
VSC8074  
O/E  
CLKI  
CLK16O±  
CLK16I±  
CLK16O±  
CLKI  
General Description  
The VSC8074 accepts a differential 10Gb/s serial input data stream (DI±). Using a 10GHz clock input  
(CLKI), the high-speed data stream is demultiplexed into 16 differential 622Mb/s parallel outputs (Q0-Q15±).  
In addition to the data outputs, a differential 622MHz clock output (CLK16O±) is provided. The device oper-  
ates using a –5.2V power supply and is packaged in a thermally-enhanced, standard plastic package.  
Functional Block Diagram  
Q0+  
Q0–  
Q1+  
DI+  
DI–  
1:16  
Demultiplexer  
D Q  
Q1–  
Q15+  
Q15–  
CLK16O+  
CLK16O–  
CLKI/2  
CLKI/16  
Timing  
Generator  
CLKI  
G52280-0, Rev. 4.0  
3/29/00  
VITESSE SEMICONDUCTOR CORPORATION  
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896  
Page 1  

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