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VNP14N04FI PDF预览

VNP14N04FI

更新时间: 2024-02-23 07:01:57
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 接口集成电路驱动局域网
页数 文件大小 规格书
14页 158K
描述
”OMNIFET”: FULLY AUTOPROTECTED POWER MOSFET

VNP14N04FI 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SFM包装说明:ISOWATT220-3
针数:3Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.82Is Samacsys:N
内置保护:TRANSIENT; OVER CURRENT; THERMAL输入特性:SCHMITT TRIGGER
接口集成电路类型:BUFFER OR INVERTER BASED PERIPHERAL DRIVERJESD-30 代码:R-PSFM-T3
JESD-609代码:e3功能数量:1
端子数量:3输出特性:OPEN-DRAIN
输出电流流向:SINK标称输出峰值电流:14 A
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:FLANGE MOUNT
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
表面贴装:NO技术:MOS
端子面层:Matte Tin (Sn)端子形式:THROUGH-HOLE
端子位置:SINGLE处于峰值回流温度下的最长时间:NOT SPECIFIED
断开时间:7.5 µs接通时间:0.5 µs
Base Number Matches:1

VNP14N04FI 数据手册

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VNB14N04-VNK14N04FM-VNP14N04FI-VNV14N04  
PROTECTION FEATURES  
During normal operation, the Input pin is  
- OVERTEMPERATURE AND SHORT CIRCUIT  
electrically connected to the gate of the internal  
power MOSFET. The device then behaves like a  
standard power MOSFET and can be used as a  
switch from DC to 50 KHz. The only difference  
from the user’s standpoint is that a small DC  
current (Iiss) flows into the Input pin in order to  
supply the internal circuitry.  
PROTECTION: these are based on sensing  
the chip temperatureand are not dependent on  
the input voltage. The location of the sensing  
element on the chip in the power stage area  
ensures fast, accurate detection of the junction  
temperature. Overtemperaturecutout occurs at  
minimum 150oC. The device is automatically  
restarted when the chip temperature falls  
below 135oC.  
The device integrates:  
- OVERVOLTAGE CLAMP PROTECTION:  
internally set at 42V, along with the rugged  
avalanche characteristics of the Power  
MOSFET stage give this device unrivalled  
ruggedness and energy handling capability.  
This feature is mainly important when driving  
inductiveloads.  
- STATUS FEEDBACK: In the case of an  
overtemperature fault condition, a Status  
Feedback is provided through the Input pin.  
The internal protection circuit disconnects the  
input from the gate and connects it instead to  
ground via an equivalent resistance of 100 .  
The failure can be detected by monitoring the  
voltage at the Input pin, which will be close to  
ground potential.  
Additional features of this device are ESD  
protection according to the Human Body model  
and the ability to be driven from a TTL Logic  
circuit (with a small increase in RDS(on)).  
- LINEAR CURRENT LIMITER CIRCUIT: limits  
the drain current Id to Ilim whatever the Input  
pin voltage. When the current limiter is active,  
the device operates in the linear region, so  
power dissipation may exceed the capability of  
the heatsink. Both case and junction  
temperatures increase, and if this phase lasts  
long enough, junction temperature may reach  
the overtemperaturethreshold Tjsh.  
4/14  

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