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UPD765B PDF预览

UPD765B

更新时间: 2024-01-27 18:51:26
品牌 Logo 应用领域
日电电子 - NEC 存储微控制器和处理器次级存储控制器外围集成电路光电二极管
页数 文件大小 规格书
17页 334K
描述
Single/Double Density Floppy-Disk Controller

UPD765B 技术参数

生命周期:Obsolete包装说明:0.600 INCH, PLASTIC, DIP-40
Reach Compliance Code:unknown风险等级:5.83
Is Samacsys:N外部数据总线宽度:8
JESD-30 代码:R-PDIP-T40端子数量:40
最高工作温度:70 °C最低工作温度:-10 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
认证状态:Not Qualified最大压摆率:140 mA
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:NO
技术:MOS温度等级:COMMERCIAL
端子形式:THROUGH-HOLE端子位置:DUAL
uPs/uCs/外围集成电路类型:SECONDARY STORAGE CONTROLLER, FLOPPY DISK DRIVEBase Number Matches:1

UPD765B 数据手册

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uPD765A/uPD765B  
Single/Double Density  
Floppy-Disk Controller  
NEC  
NEC Electronics Inc.  
Description  
Features  
The uPD765A/B is an LSI floppy disk controller (FDC)  
chip which contains the circuitry and control functions  
for interfacing a processor to 4 floppy disk drives. It is  
capableof either IBM 3740singledensity format (FM), or  
IBM System 34 double density format (MFM) including  
double-sided recording. The uPD765A/B provides con-  
trol signals which simplify the design of an external  
phase-locked loop and write precompensation circuitry.  
The FDC simplifies and handles most of the burdens as-  
sociated with implementing a floppy disk interface.  
Address mark detection circuitry is internal to the FDC  
which simplifies the phase-locked loop and read elec-  
tronics. The track stepping rate, head load time, and  
head unload time are user-programmable. The  
uPD765A/uPD765B  
offers additional features such as  
multi-track and multi-side read and write commands  
and single and double density capabilities.  
FM, MFM Control  
Variable recording length: 128,256, .8192 bytes/  
sector  
Hand-shaking signals are provided in the uPD765A/B  
which make DMA operation easy to incorporate with the  
aid of an external DMA controller chip, such as the  
IBM-compatible format (single- and double-  
sided, single- and double-density)  
uPD8257. The  
FDC will operate in eitherthe DMA or non-  
Multi-sector and multi-track transfer capability  
DMA mode. In the non-DMA mode the FDC generates  
interrupts to !he processor every time a data byte is to  
be transferred. In the DMA mode, the processor need  
only load the command into the FDC and all data  
transfers occur under control of the FDC and DMA  
controllers.  
Drive up to 4 floppy or micro floppydisk drives  
Data scan capability-will scan a single sector or  
an entire cylinder comparing byte-for-byte host  
memory and disk data  
Data transfers in DMA or non-DMA mode  
Parallel seek operations on up to four drives  
There are 16 commands which the uPD765A/uPD765B  
will execute. Most of these commands require multiple  
8-bit bytes to fully specify the operation which the  
processor wishes the FDC to perform. The following  
commands are available.  
Compatible with uPD8080/85,  
uPD8086/88,  
V-series  
and uPD780 (Z80@) microprocessors  
Single-phase clock: 8 MHz maximum  
+5V only  
3
Z80  
R e a d D a t a  
R e a d D e l e t e d D a t a  
Write Data  
Write ID (Format Write)  
Write Deleted Data  
Seek  
Recalibrate  
Sense Interrupt Status  
Sense Drive Status.  
is  
a
registered  
trademark  
of the Zilog  
Corporation  
R e a d I D  
Specify  
Read Diagnostic  
S c a n E q u a l  
Scan High or Equal  
S c a n L o w o r E q u a l  
Version  
Pin Configuration  
Ordering Information  
D e v i c e N u m b e r  
Package Type  
Max Freq. of Operation  
uPD765AC2  
40-pin plastic DIP  
8
MHz  
uPD765B  
40-pin plastic DIP  
8
MHz  
NECEL-000324  
5-3  

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