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UPD77018A PDF预览

UPD77018A

更新时间: 2024-02-18 22:21:16
品牌 Logo 应用领域
日电电子 - NEC 数字信号处理器
页数 文件大小 规格书
56页 355K
描述
16 bits, Fixed-point Digital Signal Processor

UPD77018A 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:QFP包装说明:LFQFP,
针数:100Reach Compliance Code:compliant
ECCN代码:3A991.A.2HTS代码:8542.31.00.01
风险等级:5.59地址总线宽度:14
桶式移位器:YES边界扫描:NO
最大时钟频率:33 MHz外部数据总线宽度:16
格式:FIXED POINT内部总线架构:MULTIPLE
JESD-30 代码:S-PQFP-G100JESD-609代码:e0
长度:14 mm低功率模式:NO
端子数量:100封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:1.27 mm
最大供电电压:3.6 V最小供电电压:2.7 V
标称供电电压:3 V表面贴装:YES
技术:CMOS端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:14 mmuPs/uCs/外围集成电路类型:DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches:1

UPD77018A 数据手册

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DATA SHEET  
MOS INTEGRATED CIRCUIT  
µPD77018A, 77019  
16 bits, Fixed-point Digital Signal Processor  
µPD77018A, 77019 are 16 bits fixed-point DSPs (Digital Signal Processors) developed for digital signal processing  
with its demand for high speed and precision.  
Maximum operating speed of the µPD77018A, 77019 is improved compared with the µPD77015, 77017, 77018.  
And the µPD77019 internal instruction RAM (4K × 32 bits) is suitable for program code replacement.  
FEATURES  
FUNCTIONS  
• Instruction cycle: 16.6 ns (MIN.)  
Operation clock: 60 MHz  
External clock: 60, 30, 20, 15, 7.5 MHz  
Crystal: 60 MHz  
• On-chip PLL to provide higher operation clock than the external clock  
• Dual load/store  
• Hardware loop function  
• Conditional execution  
• Executes product-sum operation in one instruction cycle  
PROGRAMMING  
• 16 bits × 16 bits + 40 bits 40 bits multiply accumulator  
• 8 general registers (40 bits each)  
• 8 ROM/RAM data pointer: each data memory area has 4 registers  
• 10 source interrupts (external: 4, internal: 6)  
• 3 operand instructions (example: R0 = R0 +R1L R2L)  
• Nonpipeline on execution stage  
MEMORY AREAS  
• Instruction memory area : 64K words × 32 bits  
• Data memory areas : 64K words × 16 bits × 2 (X memory, Y memory)  
In this document, all descriptions of the µPD77018A also apply to the µPD77019, unless otherwise  
specified.  
The information in this document is subject to change without notice.  
Document No. U11849EJ2V0DS00 (2nd edition)  
Date Published October 1997 N  
Printed in Japan  
The mark  
shows major revised points.  
1996  
©

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