Datasheet > UPD77019

UPD77019

更新时间： 2024-02-21 22:40:38

品牌	Logo	应用领域
日电电子 - NEC		数字信号处理器
页数	文件大小	规格书
56页	355K
描述
16 bits, Fixed-point Digital Signal Processor

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中文翻译

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数据手册

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UPD77019 数据手册

DATA SHEET

MOS INTEGRATED CIRCUIT

µPD77018A, 77019

16 bits, Fixed-point Digital Signal Processor

µPD77018A, 77019 are 16 bits fixed-point DSPs (Digital Signal Processors) developed for digital signal processing

with its demand for high speed and precision.

Maximum operating speed of the µPD77018A, 77019 is improved compared with the µPD77015, 77017, 77018.

And the µPD77019 internal instruction RAM (4K × 32 bits) is suitable for program code replacement.

FEATURES

• FUNCTIONS

• Instruction cycle: 16.6 ns (MIN.)

Operation clock: 60 MHz

External clock: 60, 30, 20, 15, 7.5 MHz

Crystal: 60 MHz

• On-chip PLL to provide higher operation clock than the external clock

• Dual load/store

• Hardware loop function

• Conditional execution

• Executes product-sum operation in one instruction cycle

• PROGRAMMING

• 16 bits × 16 bits + 40 bits → 40 bits multiply accumulator

• 8 general registers (40 bits each)

• 8 ROM/RAM data pointer: each data memory area has 4 registers

• 10 source interrupts (external: 4, internal: 6)

• 3 operand instructions (example: R0 = R0 +R1L R2L)

• Nonpipeline on execution stage

• MEMORY AREAS

• Instruction memory area : 64K words × 32 bits

• Data memory areas : 64K words × 16 bits × 2 (X memory, Y memory)

In this document, all descriptions of the µPD77018A also apply to the µPD77019, unless otherwise

specified.

The information in this document is subject to change without notice.

Document No. U11849EJ2V0DS00 (2nd edition)

Date Published October 1997 N

Printed in Japan

The mark

shows major revised points.

1996

12 3 4 5 6 7...56

中文翻译

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