Datasheet > UPD4481362GF-A50Y

UPD4481362GF-A50Y

更新时间： 2024-11-18 21:06:23

品牌	Logo	应用领域
日电电子 - NEC		静态存储器
页数	文件大小	规格书
28页	410K
描述
ZBT SRAM, 256KX36, 3.2ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100

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UPD4481362GF-A50Y 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	QFP	包装说明：	14 X 20 MM, PLASTIC, LQFP-100
针数：	100	Reach Compliance Code：	compliant
ECCN代码：	3A991.B.2.A	HTS代码：	8542.32.00.41
风险等级：	5.69	最长访问时间：	3.2 ns
其他特性：	PIPELINED ARCHITECTURE	JESD-30 代码：	R-PQFP-G100
JESD-609代码：	e0	长度：	20 mm
内存密度：	9437184 bit	内存集成电路类型：	ZBT SRAM
内存宽度：	36	功能数量：	1
端子数量：	100	字数：	262144 words
字数代码：	256000	工作模式：	SYNCHRONOUS
最高工作温度：	85 °C	最低工作温度：	-40 °C
组织：	256KX36	封装主体材料：	PLASTIC/EPOXY
封装代码：	LQFP	封装形状：	RECTANGULAR
封装形式：	FLATPACK, LOW PROFILE	并行/串行：	PARALLEL
峰值回流温度（摄氏度）：	NOT SPECIFIED	认证状态：	Not Qualified
座面最大高度：	1.7 mm	最大供电电压 (Vsup)：	3.465 V
最小供电电压 (Vsup)：	3.135 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	TIN LEAD
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	14 mm	Base Number Matches：	1

UPD4481362GF-A50Y 数据手册

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DATA SHEET

MOS INTEGRATED CIRCUIT

PD4481162, 4481182, 4481322, 4481362

8M-BIT ZEROSB^TMSRAM

PIPELINED OPERATION

Description

The µPD4481162 is a 524,288-word by 16-bit, the µPD4481182 is a 524,288-word by 18-bit, the µPD4481322 is a

262,144-word by 32-bit and the µPD4481362 is a 262,144-word by 36-bit ZEROSB static RAM fabricated with

advanced CMOS technology using full CMOS six-transistor memory cell.

The µPD4481162, µPD4481182, µPD4481322 and µPD4481362 are optimized to eliminate dead cycles for read to

write, or write to read transitions. These ZEROSB static RAMs integrate unique synchronous peripheral circuitry, 2-bit

burst counter and output buffer as well as SRAM core. All input registers are controlled by a positive edge of the

single clock input (CLK).

The µPD4481162, µPD4481182, µPD4481322 and µPD4481362 are suitable for applications which require

synchronous operation, high speed, low voltage, high density and wide bit configuration, such as buffer memory.

ZZ has to be set LOW at the normal operation. When ZZ is set HIGH, the SRAM enters Power Down State (“Sleep”).

In the “Sleep” state, the SRAM internal state is preserved. When ZZ is set LOW again, the SRAM resumes normal

operation.

The µPD4481162, µPD4481182, µPD4481322 and µPD4481362 are packaged in 100-pin PLASTIC LQFP with a 1.4

mm package thickness for high density and low capacitive loading.

Features

• Low voltage core supply : V_DD= 3.3 ± 0.165 V (-A44, -A50, -A60, -A75, -A44Y, -A50Y, -A60Y, -A75Y)

V_DD= 2.5 ± 0.125 V (-C60, -C75, -C60Y, -C75Y)

• Synchronous operation

• Operating temperature : T_A= 0 to 70 °C (-A44, -A50, -A60, -A75, -C60, -C75)

T_A= −40 to +85 °C (-A44Y, -A50Y, -A60Y, -A75Y, -C60Y, -C75Y)

• 100 percent bus utilization

• Internally self-timed write control

• Burst read / write : Interleaved burst and linear burst sequence

• Fully registered inputs and outputs for pipelined operation

• All registers triggered off positive clock edge

• 3.3V or 2.5V LVTTL Compatible : All inputs and outputs

• Fast clock access time : 2.8 ns (225 MHz), 3.2 ns (200 MHz), 3.5 ns (167 MHz) , 4.2 ns (133 MHz)

• Asynchronous output enable : /G

• Burst sequence selectable : MODE

• Sleep mode : ZZ (ZZ = Open or Low : Normal operation)

• Separate byte write enable : /BW1 to /BW4 (µPD4481322 and µPD4481362)

/BW1 and /BW2 (µPD4481162 and µPD4481182)

• Three chip enables for easy depth expansion

• Common I/O using three state outputs

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all products and/or types are available in every country. Please check with an NEC Electronics

sales representative for availability and additional information.

Document No. M15562EJ3V0DS00 (3rd edition)

Date Published December 2002 NS CP(K)

Printed in Japan

The mark shows major revised points.

2001

12 3 4 5 6 7...28

中文翻译

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与UPD4481362GF-A50Y相关器件

型号	品牌	获取价格	描述	数据表
UPD4481362GF-A50Y-A	NEC	获取价格	ZBT SRAM, 256KX36, 3.2ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100
UPD4481362GF-A60	NEC	获取价格	8M-BIT ZEROSB SRAM PIPELINED OPERATION
UPD4481362GF-A60-A	RENESAS	获取价格	IC,SYNC SRAM,256KX36,CMOS,QFP,100PIN,PLASTIC
UPD4481362GF-A75	NEC	获取价格	8M-BIT ZEROSB SRAM PIPELINED OPERATION
UPD4481362GF-A75Y	NEC	获取价格	ZBT SRAM, 256KX36, 4.2ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100
UPD4481362GF-C50	NEC	获取价格	ZBT SRAM, 256KX36, 3.2ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, LQFP-100
UPD4481362GF-C50-A	NEC	获取价格	256KX36 ZBT SRAM, 3.2ns, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, LQFP-100
UPD4481362GF-C60	NEC	获取价格	8M-BIT ZEROSB SRAM PIPELINED OPERATION
UPD4481362GF-C60Y	NEC	获取价格	ZBT SRAM, 256KX36, 3.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100
UPD4481362GF-C75	NEC	获取价格	8M-BIT ZEROSB SRAM PIPELINED OPERATION

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