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UPA1500BH-AZ PDF预览

UPA1500BH-AZ

更新时间: 2024-11-16 20:04:47
品牌 Logo 应用领域
瑞萨 - RENESAS 开关脉冲晶体管
页数 文件大小 规格书
8页 93K
描述
3A, 60V, 0.024ohm, 4 CHANNEL, N-CHANNEL, Si, POWER, MOSFET, SIP-12

UPA1500BH-AZ 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:IN-LINE, R-PSIP-T12针数:12
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8541.29.00.95风险等级:5.37
雪崩能效等级(Eas):0.9 mJ配置:COMPLEX
最小漏源击穿电压:60 V最大漏极电流 (Abs) (ID):3 A
最大漏极电流 (ID):3 A最大漏源导通电阻:0.024 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJESD-30 代码:R-PSIP-T12
元件数量:4端子数量:12
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):260
极性/信道类型:N-CHANNEL最大功率耗散 (Abs):28 W
最大脉冲漏极电流 (IDM):12 A认证状态:Not Qualified
子类别:FET General Purpose Power表面贴装:NO
端子形式:THROUGH-HOLE端子位置:SINGLE
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

UPA1500BH-AZ 数据手册

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DATA SHEET  
COMPOUND FIELD EFFECT POWER TRANSISTOR  
µPA1500B  
N-CHANNEL POWER MOS FET ARRAY  
SWITCHING USE  
DESCRIPTION  
PACKAGE DIMENSIONS  
The µPA1500B is N-channel Power MOS FET Array  
that built in 4 circuits and surge absorber designed for  
solenoid, motor and lamp driver.  
(in millimeters)  
4.2 MAX.  
31.5 MAX.  
FEATURES  
4 V driving is possible  
Large Current and Low On-state Resistance  
ID(DC) = ±3 A  
1
2 3 4 5 6 7 8 9 10 11 12  
RDS(on)1 0.18 MAX. (VGS = 10 V, ID = 2 A)  
RDS(on)2 0.24 MAX. (VGS = 4 V, ID = 2 A)  
Low Input Capacitance Ciss = 200 pF TYP.  
Surge Absorber, built in  
2.54 TYP.  
0.7±0.1  
1.4±0.1 0.5±0.1  
1.4 TYP.  
ORDERING INFORMATION  
ELECTRODE CONNECTION  
1, 5, 8, 12 GATE  
2, 4, 9, 11 DRAIN, ANODE  
Type Number  
Package  
6, 7  
SOURCE  
3, 10  
CATHODE  
µPA1500BH  
12 Pin SIP  
CONNECTION DIAGRAM  
ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C)  
2
3
4
Note 1  
Drain to Source Voltage  
Gate to Source Voltage  
Drain Current (DC)  
Drain Current (pulse)  
Repetitive peak Reverse Voltage VRRM  
Diode Forward Current  
Total Power Dissipation  
Total Power Dissipation  
Channel Temperature  
Storage Temperature  
Single Avalanche Current  
Single Avalanche Energy  
Notes 1. VGS = 0  
VDSS  
VGSS  
ID(DC)  
60  
±20  
±3.0  
±12  
65  
V
V
A/unit  
A/unit  
V
A/unit  
W
W
˚C  
˚C  
A
mJ  
D
5
1
D
6
Note 2  
Note 3  
ID(pulse)  
D
D2  
R
G
R
G
Note 4  
1
5
Note 4  
IF(av)  
3.0  
Z
D
Z
D
Note 5  
6
PT1  
PT2  
TCH  
Tstg  
IAS  
EAS  
28  
4.0  
150  
–55 to 150  
3.0  
Note 6  
9
10  
11  
D
7
3
D8  
Note 7  
Note 7  
D
D4  
RG  
R
G
0.9  
8
12  
2. VDS = 0  
3. PW 10 µs, Duty Cycle 1 %  
4. Rating of Surge Absorber  
5. 4 Circuits, T  
6. 4 Circuits, TA = 25 ˚C  
Z
D
Z
D
7
D
D
1
5
to D  
to D  
4
8
: Body Diode  
: Surge Absorber  
: Gate to Source Protection Diode  
C
= 25 ˚C  
Z
D
RG  
: Gate Input Resistance 330 TYP.  
7. Starting TCH = 25 ˚C, V DD = 30 V, VGS = 20 V 0,  
RG = 25 , L = 100 µH  
The diode connected between the gate and source of the transistor serves as a protector against ESD. When this  
device is actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage  
may be applied to this device.  
Document No. G10597EJ2V0DS00 (2nd edition)  
Date Published December 1995 P  
Printed in Japan  
1995  
©

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