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UCC2882DWTR PDF预览

UCC2882DWTR

更新时间: 2024-11-25 23:39:03
品牌 Logo 应用领域
其他 - ETC 开关光电二极管信息通信管理控制器
页数 文件大小 规格书
14页 622K
描述
Current-Mode SMPS Controller

UCC2882DWTR 数据手册

 浏览型号UCC2882DWTR的Datasheet PDF文件第2页浏览型号UCC2882DWTR的Datasheet PDF文件第3页浏览型号UCC2882DWTR的Datasheet PDF文件第4页浏览型号UCC2882DWTR的Datasheet PDF文件第5页浏览型号UCC2882DWTR的Datasheet PDF文件第6页浏览型号UCC2882DWTR的Datasheet PDF文件第7页 
UCC2882/-1  
UCC3882/-1  
Average Current Mode Synchronous Controller With 5-Bit DAC  
DESCRIPTION  
FEATURES  
The UCC3882 combines high precision reference and voltage  
monitoring circuitry with average current mode PWM synchro-  
nous rectification controller circuitry to power high-end micropro-  
cessors with a minimum of external components. The UCC3882  
converts 5V or 12V to an adjustable output ranging from 1.8VDC  
to 2.05VDC in 50mV steps and 2.1VDC to 3.5VDC in 100mV  
steps with 1% DC system accuracy.  
Combined DAC/Voltage Monitor and PWM  
with Synchronous Rectification Functions  
5-Bit Digital-to-Analog (DAC) Converter  
1% DAC/Reference Combined Accuracy  
Compatible with 5V and 12V Systems and  
12V-only Systems  
The DAC output voltage is directly compatible with Intel’s 5-bit  
VID code (Table 1) which covers 1.3V to 2.05V in 50mV steps  
and 2.1V to 3.5V in 100mV steps. The accuracy of the DAC/ref-  
erence combination is better than 1%. Undervoltage lockout cir-  
cuitry assures the correct logic states at the outputs during  
power up and power down. The overvoltage and undervoltage  
comparators monitor the system output voltage and indicate  
when it rises above or falls below its designed value by more  
than 9%. A second overvoltage comparator digitally forces  
GATEHI off and GATELO on when the system output voltage ex-  
ceeds its designed value by more than 17.5%.  
Low Offset Current Sense Amplifier  
Programmable Oscillator Frequency Practical  
to 700kHz  
Foldback Current Limiting  
Overvoltage and Undervoltage Fault Windows  
2Totem Pole Outputs with Programmable  
Dead Times to Eliminate Cross-Conduction  
Chip Disable Function  
(continued)  
BLOCK DIAGRAM  
UDG-97047-1  
03/99  
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