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SLUS539A − JUNE 2004 − REVISED AUGUST 2004
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FEATURES
APPLICATIONS
D
On-Chip Predictive Gate Drivet for
High-Efficiency Synchronous Buck
Operation
D
Secondary-Side Post Regulation (SSPR) for
Multiple Output Power Supplies
D
Cascaded Buck Converters
D
D
Dual 3-A TrueDrivet Outputs
D
Post Processing Converters for Bus
Converter and DC Transformer Architectures
1-MHz High Frequency Operation with 70-ns
Delay from SYNCIN to G1 Output
DESCRIPTION
D
Leading Edge Modulation
The UCC2540 is a secondary-side synchronous
D
Overcurrent Protection using a Parallel
Average Current Mode Control Loop
buck PWM controller for high current and low
output voltage applications. It can be used either
as the local secondary-side controller for isolated
dc-to-dc converters using two-stage cascaded
topologies or as a secondary-side post regulator
(SSPR) for multiple output power supplies.
D
3 Modes to Support 2.7-V to 35-V Bias
Operation
D
D
D
D
D
Reverse Current Protection for Output Stage
User Programmable Shutdown
1.0% Initial Tolerance Bandgap Reference
High Bandwidth Error Amplifiers
The UCC2540 runs with the synchronization
signal from either the primary side or the high duty
cycle quasi-dc output of bus converters or dc
transformers. For higher efficiency, it also
incorporates the Predictive Gate Drivet
technology that virtually eliminates body diode
conduction losses in synchronous rectifiers.
Thermally Enhanced HTSSOP 20-Pin
PowerPADt Package
SIMPLIFIED APPLICATION DIAGRAM
Main
Output
UCC25701
Input
C1
OUT
AUX
Output
RSNS
FB
QP
V
FB
UCC2540
13 VDRV
VEA−
REF
7
2
14 G2
12 G2S
16 VDD
19 BST
18 G1
R1
Main
Output
TR 10
COMP
9
3
G2C
20 SWS
17 SW
15 PGND
CEA−
RSET
8
1
5
R2
11 SS SYNCIN RAMP
4
UDG−04057
Predictive Gate Drive, TrueDrive, and PowerPAD, are a trademarks of Texas Instruments Incorporated.
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Copyright 2004, Texas Instruments Incorporated
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ꢢ ꢦ ꢣ ꢢꢛ ꢜꢰ ꢞꢝ ꢡ ꢩꢩ ꢧꢡ ꢟ ꢡ ꢠ ꢦ ꢢ ꢦ ꢟ ꢣ ꢫ
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