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UC1825AVTD1 PDF预览

UC1825AVTD1

更新时间： 2024-11-05 01:10:31
品牌 Logo 应用领域
德州仪器 - TI 开关
页数 文件大小 规格书
5页 148K
描述
RAD-TOLERANT, HIGH-SPEED PWM CONTROLLER

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UC1825AVTD1 技术参数

生命周期：Active包装说明：DIE,
Reach Compliance Code：not_compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.73
其他特性：ALSO AVAILABLE WITH CURRENT MODE模拟集成电路 - 其他类型：SWITCHING CONTROLLER
控制模式：VOLTAGE-MODE控制技术：PULSE WIDTH MODULATION
JESD-30 代码：R-XUUC-N17长度：3.403 mm
功能数量：1端子数量：17
封装主体材料：UNSPECIFIED封装代码：DIE
封装形状：RECTANGULAR封装形式：UNCASED CHIP
峰值回流温度（摄氏度）：NOT SPECIFIED表面贴装：YES
端子形式：NO LEAD端子位置：UPPER
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：3.073 mm
Base Number Matches：1

UC1825AVTD1 数据手册

 浏览型号UC1825AVTD1的Datasheet PDF文件第2页浏览型号UC1825AVTD1的Datasheet PDF文件第3页浏览型号UC1825AVTD1的Datasheet PDF文件第4页浏览型号UC1825AVTD1的Datasheet PDF文件第5页 
UC1825A-DIE  
www.ti.com  
SLUSBL3 –JUNE 2013  
RAD-TOLERANT, HIGH-SPEED PWM CONTROLLER  
Check for Samples: UC1825A-DIE  
1
FEATURES  
(1)  
•
Rad-Tolerant: 30 kRad (Si) TID  
•
•
•
•
•
•
50-ns Propagation Delay to Output  
High-Current Dual Totem Pole Outputs  
•
Compatible With Voltage-Mode or Current-  
Mode Control Methods  
Trimmed Oscillator Discharge Current  
Low 100-μA Startup Current  
•
Practical Operation at Switching Frequencies  
Pulse-by-Pulse Current Limiting Comparator  
(1) Radiation tolerance is a typical value based upon initial device  
qualification with dose rate = 10 mrad/sec. Radiation Lot  
Acceptance Testing is available - contact factory for details.  
Latched Overcurrent Comparator With Full  
Cycle Restart  
DESCRIPTION  
The UC1825A-DIE PWM controller is an improved version of the standard UC1825 family. Performance  
enhancements have been made to several of the circuit blocks. Error amplifier gain bandwidth product is  
12 MHz, while input offset voltage is 2 mV. Current limit threshold is assured to a tolerance of 5%. Oscillator  
discharge current is specified at 10 mA for accurate dead time control. Frequency accuracy is improved to 6%.  
Startup supply current, typically 100 μA, is ideal for off-line applications. The output drivers are redesigned to  
actively sink current during UVLO at no expense to the startup current specification. In addition each output is  
capable of 2-A peak currents during transitions.  
ORDERING INFORMATION(1)  
PACKAGE  
DESIGNATOR  
PRODUCT  
PACKAGE  
ORDERABLE PART NUMBER  
PACKAGE QUANTITY  
UC1825AVTD1  
UC1825AVTD2  
81  
10  
UC1825A  
TD  
Bare die in waffle pack(2)  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
web site at www.ti.com.  
(2) Processing is per the Texas Instruments space production baseline and is in compliance with the Texas Instruments Quality Control  
System in effect at the time of manufacture. Electrical screening consists of DC parametric and functional testing at room temperature  
only. Unless otherwise specified by Texas Instruments AC performance and performance over temperature is not warranted. Visual  
Inspection is performed in accordance with MIL-STD-883 Test Method 2010 Condition B at 75X minimum.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2013, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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