UC1525B-SP
www.ti.com ............................................................................................................................................................................................... SLUS874–JANUARY 2009
RAD-TOLERANT CLASS-V REGULATING PULSE WIDTH MODULATOR
1
FEATURES
DESCRIPTION
•
•
•
•
QML-V Qualified, SMD 5962-89511
(1)
Rad-Tolerant: 30 kRad (Si) TID
The UC1525B pulse width modulator integrated
circuit is designed to offer improved performance and
lowered external parts count when used in designing
all types of switching power supplies. The on-chip
5.1-V buried zener reference is trimmed to ±0.75%,
and the input common-mode range of the error
amplifier includes the reference voltage, eliminating
external resistors. A sync input to the oscillator allows
multiple units to be slaved or a single unit to be
synchronized to an external system clock. A single
resistor between the CT and the discharge terminals
provide a wide range of dead-time adjustment. These
devices also feature built-in soft-start circuitry with
8-V to 35-V Operation
5.1-V Buried Zener Reference Trimmed to
±0.75%
•
•
•
•
•
•
•
•
•
•
100-Hz to 400-kHz Oscillator Range
Separate Oscillator Sync Terminal
Adjustable Deadtime Control
Internal Soft Start
Pulse-by-Pulse Shutdown
Input Undervoltage Lockout With Hysteresis
Latching PWM to Prevent Multiple Pulses
Dual Source/Sink Output Drivers
Low Cross Conduction Output Stage
Tighter Reference Specifications
only an external timing capacitor required.
A
shutdown terminal controls both the soft-start circuitry
and the output stages, providing instantaneous turn
off through the PWM latch with pulsed shutdown, as
well as soft-start recycle with longer shutdown
commands. These functions are also controlled by an
undervoltage lockout which keeps the outputs off and
the soft-start capacitor discharged for sub-normal
input voltages. This lockout circuitry includes
approximately 500 mV of hysteresis for jitter-free
operation. Another feature of these PWM circuits is a
latch following the comparator. Once a PWM pulse
has been terminated for any reason, the outputs
remain off for the duration of the period. The latch is
reset with each clock pulse. The output stages are
totem-pole designs capable of sourcing or sinking in
excess of 200 mA. The UC1525B output stage
features NOR logic, giving a LOW output for an OFF
state.
(1) Radiation tolerance is a typical value based upon initial device
qualification with dose rate = 10 mrad/sec. Radiation Lot
Acceptance Testing is available - contact factory for details.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.