TXS0101
1-BIT BIDIRECTIONAL VOLTAGE-LEVEL TRANSLATOR
FOR OPEN-DRAIN APPLICATIONS
www.ti.com
SCES638–OCTOBER 2007
1
FEATURES
DBV, DCK, OR DRL PACKAGE
2
•
Available in the Texas Instruments NanoFree™
(TOP VIEW)
Package
VCCA
GND
A
VCCB
OE
B
1
2
3
6
5
4
•
•
1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on
B port (VCCA ≤ VCCB
)
VCC Isolation Feature – If Either VCC Input Is at
GND, Both Ports Are in the High-Impedance
State
YZP PACKAGE
(BOTTOM VIEW)
•
•
•
Ioff Supports Partial-Power-Down Mode
Operation
3 4
A
GND
VCCA
B
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
2
5
OE
VCCB
1 6
ESD Protection Exceeds JESD 22
–
A Port
abc
abc
abc
abc
abc
–
–
–
2500-V Human-Body Model (A114-B)
200-V Machine Model (A115-A)
1500-V Charged-Device Model (C101)
–
B Port
–
–
–
8-kV Human-Body Model (A114-B)
200-V Machine Model (A115-A)
1500-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
This one-bit noninverting translator uses two separate configurable power-supply rails. The A port is designed to
track VCCA. VCCA accepts any supply voltage from 1.65 V to 3.6 V. The B port is designed to track VCCB. VCCA
must be less than or equal to VCCB. VCCB accepts any supply voltage from 2.3 V to 5.5 V. This allows for
low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
ORDERING INFORMATION
TA
PACKAGE(1)(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(3)
_ _ _2G_
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP
(Pb-free)
Reel of 3000
TXS0101YZPR
Reel of 3000
Reel of 250
Reel of 3000
Reel of 250
Reel of 3000
Reel of 250
TXS0101DBVR
TXS0101DBVT
TXS0101DCKR
TXS0101DCKT
TXS0101DRLR
TXS0101DRLT
SOT (SOT-23) – DBV
SOT (SC-70) – DCK
SOT (SOT-563) – DRL
2G_
–40°C to 85°C
NFF_
2G_
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(3) DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
NanoFree is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated