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TPS54388-Q1

更新时间： 2024-09-19 12:21:47
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
38页 1599K
描述
2.95-V to 6-V Input, 3-A Output, 2-MHz, Synchronous Step-Down Switcher With Integrated FETs

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TPS54388-Q1 数据手册

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TPS54388-Q1  
www.ti.com  
SLVSAF1B –OCTOBER 2010–REVISED JULY 2012  
2.95-V to 6-V Input, 3-A Output, 2-MHz, Synchronous Step-Down  
Switcher With Integrated FETs  
Check for Samples: TPS54388-Q1  
1
FEATURES  
DESCRIPTION  
The TPS54388-Q1 device is a full featured 6 V, 3 A,  
synchronous step down current mode converter with  
two integrated MOSFETs.  
2
•
•
Qualified for Automotive Applications  
Two 12-mΩ (typical) MOSFETs for High  
Efficiency at 3-A Loads  
The TPS54388-Q1 enables small designs by  
integrating the MOSFETs, implementing current  
mode control to reduce external component count,  
reducing inductor size by enabling up to 2 MHz  
switching frequency, and minimizing the IC footprint  
with a small 3 mm x 3 mm thermally enhanced QFN  
package.  
•
•
200 kHz to 2 MHz Switching Frequency  
0.8 V ± 1% Voltage Reference Over  
Temperature (–40°C to 150°C)  
•
•
•
•
Synchronizes to External Clock  
Adjustable Slow Start/Sequencing  
UV and OV Power Good Output  
The TPS54388-Q1 provides accurate regulation for a  
variety of loads with an accurate ±1% Voltage  
Reference (VREF) over temperature.  
–40°C to 150°C Operating Junction  
Temperature Range  
•
•
Thermally Enhanced 3mm × 3mm 16-pin QFN  
Pin Compatible to TPS54418  
Efficiency is maximized through the integrated 12 mΩ  
MOSFETs and 515 μA typical supply current. Using  
the enable pin, shutdown supply current is reduced to  
5.5 µA by entering a shutdown mode.  
APPLICATIONS  
•
•
Low-Voltage, High-Density Power Systems  
Under voltage lockout is internally set at 2.45 V, but  
can be increased by programming the threshold with  
a resistor network on the enable pin. The output  
voltage startup ramp is controlled by the slow start  
pin. An open drain power good signal indicates the  
output is within 93% to 107% of its nominal voltage.  
Point of Load Regulation for High Performance  
DSPs, FPGAs, ASICs and Microprocessors  
•
Broadband, Networking and Optical  
Communications Infrastructure  
Frequency fold back and thermal shutdown protects  
the device during an over-current condition.  
SIMPLIFIED SCHEMATIC  
vertical spacer  
100  
3 Vin  
vertical spacer  
95  
5 Vin  
VIN  
90  
C
BOOT  
VIN  
85  
BOOT  
C
I
R
R
4
5
TPS54388-Q1  
EN  
80  
75  
L
O
VOUT  
PH  
C
O
70  
65  
60  
R
1
2
PWRGD  
VSENSE  
R
SS/TR  
RT /CLK  
COMP  
f
= 500kHz  
s
55  
50  
Vout = 1.8V  
GND  
AGND  
0
1
2
3
4
5
6
I
- Output Current - A  
C
POWERPAD  
ss  
O
R
R
T
3
C
1
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
PowerPAD is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2010–2012, Texas Instruments Incorporated  
 
 
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