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TMS46100P PDF预览

TMS46100P

更新时间: 2024-11-11 22:49:39
品牌 Logo 应用领域
德州仪器 - TI 存储
页数 文件大小 规格书
25页 384K
描述
4194304-WORD BY 1-BIT DYNAMIC RANDOM-ACCESS MEMORIES

TMS46100P 数据手册

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TMS44100, TMS44100P, TMS46100, TMS46100P  
4194304-WORD BY 1-BIT  
DYNAMIC RANDOM-ACCESS MEMORIES  
SMHS561A – MARCH 1995 – REVISED JUNE 1995  
DGA PACKAGE  
(TOP VIEW)  
DJ PACKAGE  
(TOP VIEW)  
Organization . . . 4194304 × 1  
Single 5 V Power Supply, for TMS44100/P  
(±10% Tolerance)  
D
W
RAS  
NC  
1
2
3
4
5
26  
25  
24  
23  
22  
V
Q
CAS  
NC  
A9  
D
W
RAS  
NC  
1
2
3
4
5
26  
25  
24  
23  
22  
V
SS  
Q
CAS  
NC  
A9  
SS  
Single 3.3 V Power Supply, for TMS46100/P  
(±10% Tolerance)  
Low Power Dissipation (TMS46100P only)  
– 200-µA CMOS Standby  
– 200-µA Self Refresh  
A10  
A10  
– 300-µA Extended-Refresh Battery  
Backup  
A0  
A1  
A2  
A3  
9
18  
17  
16  
15  
14  
A8  
A7  
A6  
A5  
A4  
A0  
A1  
A2  
A3  
9
18  
17  
16  
15  
14  
A8  
A7  
A6  
A5  
A4  
10  
11  
12  
13  
10  
11  
12  
13  
Performance Ranges:  
ACCESS ACCESS ACCESS  
TIME TIME TIME OR WRITE  
(t (t  
READ  
V
V
CC  
CC  
)
)
(t  
AA  
)
CYCLE  
(MIN)  
RAC CAC  
(MAX)  
60 ns  
70 ns  
80 ns  
(MAX)  
15 ns  
18 ns  
20 ns  
(MAX)  
30 ns  
35 ns  
40 ns  
’4x100/P-60  
’4x100/P-70  
’4x100/P-80  
110 ns  
130 ns  
150 ns  
PIN NOMENCLATURE  
A0A10  
CAS  
D
Address Inputs  
Column-Address Strobe  
Enhanced Page-Mode Operation for Faster  
Memory Access  
Data In  
NC  
No Connection  
Data Out  
CAS-Before-RAS (CBR) Refresh  
Q
RAS  
W
Row-Address Strobe  
Write Enable  
5-V or 3.3-V Supply  
Ground  
Long Refresh Period  
– 1024-Cycle Refresh in 16 ms  
– 128 ms (Max) for Low-Power,  
Self-Refresh Version (TMS4x100P)  
V
CC  
V
SS  
3-State Unlatched Output  
Texas Instruments EPIC CMOS Process  
Operating Free-Air Temperature Range  
0°C to 70°C  
description  
The TMS4x100 series are high-speed,  
4194304-bit dynamic random-access memories,  
organized as 4194304 words of one bit each. The  
TMS4x100P series are high-speed, low-power,  
self-refresh with extended-refresh, 4194304-bit  
dynamic random-access memories, organized as  
4194304 words of one bit each. Both series  
SELF-REFRESH  
POWER  
SUPPLY  
REFRESH  
CYCLES  
DEVICE  
BATTERY  
BACKUP  
TMS44100  
TMS44100P  
TMS46100  
TMS46100P  
5 V  
5 V  
YES  
1024 in 16 ms  
1024 in 128 ms  
1024 in 16 ms  
1024 in 128 ms  
3.3 V  
3.3 V  
employ state-of-the-art EPIC  
(Enhanced  
YES  
Performance Implanted CMOS) technology for  
high performance, reliability, and low voltage.  
These devices feature maximum RAS access times of 60 ns, 70 ns, and 80 ns. All addresses and data-in lines  
are latched on chip to simplify system design. Data out is unlatched to allow greater system flexibility.  
The TMS4x100 and TMS4x100P are offered in a 20-/26-lead plastic surface-mount small-outline (TSOP)  
package(DGAsuffix)anda300-mil20-/26-leadplasticsurface-mountSOJpackage(DJsuffix). Bothpackages  
are characterized for operation from 0°C to 70°C.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1995, Texas Instruments Incorporated  
ADVANCE INFORMATION concerns new products in the sampling or  
preproduction phase of development. Characteristic data and other  
specifications are subject to change without notice.  
1
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443  

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