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TMS46400DJ PDF预览

TMS46400DJ

更新时间: 2024-09-23 22:49:39
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德州仪器 - TI 存储
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25页 661K
描述
1048576-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORIES

TMS46400DJ 数据手册

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TMS44400, TMS44400P, TMS46400, TMS46400P  
1048576-WORD BY 4-BIT  
DYNAMIC RANDOM-ACCESS MEMORIES  
SMHS562C – MAY 1995 – REVISED NOVEMBER 1996  
DGA PACKAGE  
(TOP VIEW)  
DJ PACKAGE  
(TOP VIEW)  
Organization . . . 1048576 × 4  
Single 5-V Power Supply for TMS44400/P  
(±10% Tolerance)  
DQ1  
DQ2  
W
RAS  
A9  
1
2
3
4
5
26  
25  
24  
23  
22  
V
DQ1  
DQ2  
W
RAS  
A9  
1
2
3
4
5
26  
25  
24  
23  
22  
V
SS  
SS  
Single 3.3-V Power Supply for TMS46400/P  
(±10% Tolerance)  
DQ4  
DQ3  
CAS  
OE  
DQ4  
DQ3  
CAS  
OE  
Low Power Dissipation (TMS46400P only)  
200-µA CMOS Standby  
200-µA Self Refresh  
300-µA Extended-Refresh Battery  
Backup  
A0  
A1  
A2  
A3  
9
18  
17  
16  
15  
14  
A8  
A7  
A6  
A5  
A4  
A0  
A1  
A2  
A3  
9
18  
17  
16  
15  
14  
A8  
A7  
A6  
A5  
A4  
10  
11  
12  
13  
10  
11  
12  
13  
Performance Ranges:  
ACCESS ACCESS ACCESS  
TIME TIME TIME OR WRITE  
(t (t  
READ  
V
V
CC  
CC  
)
)
(t  
AA  
)
CYCLE  
(MIN)  
RAC CAC  
(MAX)  
60 ns  
70 ns  
80 ns  
(MAX)  
15 ns  
18 ns  
20 ns  
(MAX)  
30 ns  
35 ns  
40 ns  
’4x400/P-60  
’4x400/P-70  
’4x400/P-80  
110 ns  
130 ns  
150 ns  
PIN NOMENCLATURE  
A0A9  
CAS  
Address Inputs  
Column-Address Strobe  
Data In  
Enhanced Page-Mode Operation for Faster  
Memory Access  
DQ1DQ4  
OE  
Output Enable  
Row-Address Strobe  
5-V or 3.3-V Supply  
Ground  
CAS-Before-RAS (CBR) Refresh  
RAS  
V
V
CC  
Long Refresh Period  
SS  
1024-Cycle Refresh in 16 ms  
128 ms (MAX) for Low-Power,  
Self-Refresh Version (TMS4x400P)  
W
Write Enable  
3-State Unlatched Output  
Operating Free-Air Temperature Range  
0°C to 70°C  
Texas Instruments EPIC CMOS Process  
description  
AVAILABLE OPTIONS  
SELF-REFRESH  
The TMS4x400 series is a set of high-speed,  
4194304-bit dynamic random-access memories  
(DRAMs), organized as 1048576 words of four  
bits each. The TMS4x400P series is a set of  
high-speed,  
extended-refresh,  
POWER  
SUPPLY  
REFRESH  
CYCLES  
DEVICE  
BATTERY  
BACKUP  
TMS44400  
TMS44400P  
TMS46400  
TMS46400P  
5 V  
5 V  
Yes  
1024 in 16 ms  
low-power,  
self-refresh  
with  
1024 in 128 ms  
1024 in 16 ms  
1024 in 128 ms  
4194304-bit  
DRAMs,  
3.3 V  
3.3 V  
organized as 1048576 words of four bits each.  
Both series employ state-of-the-art enhanced  
Yes  
performance  
technology for high performance, reliability, and  
low power.  
implanted  
CMOS  
(EPIC )  
These devices feature maximum RAS access times of 60 ns, 70 ns, and 80 ns. All addresses and data-in lines  
are latched on chip to simplify system design. Data out is unlatched to allow greater system flexibility.  
TheTMS4x400andTMS4x400Pareofferedina20/26-leadplasticsmall-outline(TSOP)package(DGAsuffix)  
and a 300-mil 20/26-lead plastic surface-mount SOJ package (DJ suffix). Both packages are characterized for  
operation from 0°C to 70°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
ADVANCE INFORMATION concerns new products in the sampling or  
preproduction phase of development. Characteristic data and other  
specifications are subject to change without notice.  
1
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443  

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