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TMS45160P-60DZ PDF预览

TMS45160P-60DZ

更新时间: 2024-11-12 21:10:15
品牌 Logo 应用领域
德州仪器 - TI 动态存储器光电二极管内存集成电路
页数 文件大小 规格书
23页 349K
描述
256KX16 FAST PAGE DRAM, 60ns, PDSO40, 0.400 INCH, PLASTIC, SOJ-40

TMS45160P-60DZ 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:SOJ包装说明:SOJ, SOJ40,.44
针数:40Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.02
风险等级:5.43Is Samacsys:N
访问模式:FAST PAGE最长访问时间:60 ns
其他特性:RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH/SELF REFRESHI/O 类型:COMMON
JESD-30 代码:R-PDSO-J40长度:26.035 mm
内存密度:4194304 bit内存集成电路类型:FAST PAGE DRAM
内存宽度:16功能数量:1
端口数量:1端子数量:40
字数:262144 words字数代码:256000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:256KX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:SOJ封装等效代码:SOJ40,.44
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified刷新周期:512
座面最大高度:3.76 mm自我刷新:YES
最大待机电流:0.00035 A子类别:DRAMs
最大压摆率:0.18 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:J BEND
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10.16 mm
Base Number Matches:1

TMS45160P-60DZ 数据手册

 浏览型号TMS45160P-60DZ的Datasheet PDF文件第2页浏览型号TMS45160P-60DZ的Datasheet PDF文件第3页浏览型号TMS45160P-60DZ的Datasheet PDF文件第4页浏览型号TMS45160P-60DZ的Datasheet PDF文件第5页浏览型号TMS45160P-60DZ的Datasheet PDF文件第6页浏览型号TMS45160P-60DZ的Datasheet PDF文件第7页 
TMS45160, TMS45160P  
262144-WORD BY 16-BIT HIGH-SPEED  
DYNAMIC RANDOM-ACCESS MEMORIES  
SMHS160D – AUGUST 1992 – REVISED JUNE 1995  
DZ PACKAGE  
(TOP VIEW)  
DGE PACKAGE  
(TOP VIEW)  
ThisdatasheetisapplicabletoallTMS45160/Ps  
symbolized with Revision “D” and subsequent  
revisions as described on page 21.  
1
2
3
4
5
6
7
8
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
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21  
1
2
3
4
5
6
7
8
9
10  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
V
V
V
V
SS  
CC  
SS  
CC  
DQ0  
DQ1  
DQ2  
DQ3  
DQ15  
DQ14  
DQ13  
DQ12  
DQ0  
DQ1  
DQ2  
DQ3  
DQ15  
DQ14  
DQ13  
DQ12  
Organization . . . 262144 × 16  
5-V Supply (±10% Tolerance)  
Performance Ranges:  
V
V
V
V
ACCESS ACCESS ACCESS READ OR  
CC  
SS  
CC  
SS  
TIME  
TIME  
TIME  
WRITE  
CYCLE  
MIN  
DQ4  
DQ5  
DQ6  
DQ7  
NC  
NC  
W
RAS  
NC  
A0  
DQ11  
DQ10  
DQ9  
DQ8  
NC  
LCAS  
UCAS  
OE  
A8  
A7  
A6  
A5  
DQ4  
DQ5  
DQ6  
DQ7  
DQ11  
DQ10  
DQ9  
t
t
t
RAC  
CAC  
AA  
MAX  
MAX  
MAX  
9
’45160/P-60  
’45160/P-70  
’45160/P-80  
60 ns  
70 ns  
80 ns  
15 ns  
20 ns  
20 ns  
30 ns  
35 ns  
40 ns  
110 ns  
130 ns  
150 ns  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
DQ8  
Enhanced-Page-Mode Operation With  
xCAS-Before-RAS (xCBR) Refresh  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
NC  
NC  
W
RAS  
NC  
A0  
NC  
LCAS  
UCAS  
OE  
A8  
A7  
A6  
A5  
A4  
Long Refresh Period  
512-Cycle Refresh in 8 ms (Max)  
64 ms Max for Low Power With  
Self-Refresh Version (TMS45160P)  
A1  
A2  
A3  
A1  
A2  
A3  
A4  
V
V
3-State Unlatched Output  
Low Power Dissipation  
CC  
SS  
V
V
CC  
SS  
Texas Instruments EPIC CMOS Process  
All Inputs, Outputs, and Clocks Are TTL  
Compatible  
PIN NOMENCLATURE  
High-Reliability, 40-Lead, 400-Mil-Wide  
Plastic Surface-Mount (SOJ) Package and  
40/44-Lead Thin Small-Outline Package  
(TSOP)  
A0A8  
Address Inputs  
Data In/Data Out  
DQ0DQ15  
LCAS  
NC  
OE  
RAS  
Lower Column-Address Strobe  
No Internal Connection  
Output Enable  
Row-Address Strobe  
Upper Column-Address Strobe  
5-V Supply  
Operating Free-Air Temperature Range  
0°C to 70°C  
UCAS  
Low Power With Self-Refresh Version  
V
CC  
V
SS  
Upper and Lower Byte Control During Read  
and Write Operations  
Ground  
Write Enable  
W
description  
The TMS45160 series are high-speed, 4194304-bit dynamic random-access memories organized as 262144  
words of 16 bits each. The TMS45160P series are high-speed, low-power, self-refresh 4194304-bit dynamic  
random-access memories organized as 262144 words of 16 bits each. They employ state-of-the-art EPIC  
(Enhanced Performance Implanted CMOS) technology for high performance, reliability, and low power at low  
cost.  
These devices feature maximum RAS access times of 60 ns, 70 ns, and 80 ns. Maximum power dissipation  
is as low as 770 mW operating and 11 mW standby on 80-ns devices. All inputs and outputs, including clocks,  
are compatible with Series 74 TTL. All addresses and data-in lines are latched on chip to simplify system design.  
Data out is unlatched to allow greater system flexibility.  
The TMS45160 and TMS45160P are each offered in a 40-lead plastic surface-mount SOJ package (DZ suffix)  
and a 40/44-lead plastic surface-mount small-outline (TSOP) package (DGE suffix). These packages are  
characterized for operation from 0°C to 70°C.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443  

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256KX16 FAST PAGE DRAM, 70ns, PDSO40, TSOP-44/40
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256KX16 FAST PAGE DRAM, 70ns, PDSO40, 0.400 INCH, PLASTIC, SOJ-40
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256KX16 FAST PAGE DRAM, 100ns, PDSO40
TMS45160S-70DGE TI

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TMS45160S-70DZ TI

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256KX16 FAST PAGE DRAM, 70ns, PDSO40
TMS45160S-80DGE TI

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TMS45160S-80DZ TI

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256KX16 FAST PAGE DRAM, 80ns, PDSO40