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TMS320C6421ZWTQ5 PDF预览

TMS320C6421ZWTQ5

更新时间: 2024-11-24 11:13:39
品牌 Logo 应用领域
德州仪器 - TI 时钟双倍数据速率外围集成电路
页数 文件大小 规格书
223页 2024K
描述
C64x+ 定点 DSP- 高达 600MHz、8 位 EMIFA、16 位 DDR2 | ZWT | 361

TMS320C6421ZWTQ5 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:BGA
包装说明:LFBGA, BGA361,19X19,32针数:361
Reach Compliance Code:compliantECCN代码:3A001.A.3
HTS代码:8542.31.00.01Factory Lead Time:6 weeks
风险等级:5.29其他特性:ALSO OPERATES AT 1.05V NOMINAL SUPPLY AT400MHZ
地址总线宽度:22桶式移位器:NO
位大小:32边界扫描:YES
最大时钟频率:500 MHz外部数据总线宽度:8
格式:FIXED POINT集成缓存:YES
内部总线架构:MULTIPLEJESD-30 代码:S-PBGA-B361
JESD-609代码:e1长度:16 mm
低功率模式:NO湿度敏感等级:3
DMA 通道数量:72端子数量:361
计时器数量:5片上数据RAM宽度:8
片上程序ROM宽度:8最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:LFBGA封装等效代码:BGA361,19X19,32
封装形状:SQUARE封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):260电源:1.2,1.8,3.3 V
认证状态:Not QualifiedRAM(字数):49152
ROM可编程性:MROM座面最大高度:1.4 mm
子类别:Digital Signal Processors最大供电电压:1.26 V
最小供电电压:1.14 V标称供电电压:1.2 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:16 mmuPs/uCs/外围集成电路类型:DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches:1

TMS320C6421ZWTQ5 数据手册

 浏览型号TMS320C6421ZWTQ5的Datasheet PDF文件第2页浏览型号TMS320C6421ZWTQ5的Datasheet PDF文件第3页浏览型号TMS320C6421ZWTQ5的Datasheet PDF文件第4页浏览型号TMS320C6421ZWTQ5的Datasheet PDF文件第5页浏览型号TMS320C6421ZWTQ5的Datasheet PDF文件第6页浏览型号TMS320C6421ZWTQ5的Datasheet PDF文件第7页 
TMS320C6421  
Fixed-Point Digital Signal Processor  
www.ti.com  
SPRS346DJANUARY 2007REVISED JUNE 2008  
1 TMS320C6421 Fixed-Point Digital Signal Processor  
1.1 Features  
High-Performance Digital Signal Processor  
(C6421)  
2.5-, 2.-, 1.67-,1.43- ns Instruction Cycle  
Time  
400-, 500-, 600-, 700-MHz C64x+™ Clock  
Rate  
Eight 32-Bit C64x+ Instructions/Cycle  
3200, 4000, 4800, 5600 MIPS  
Fully Software-Compatible With C64x  
Commercial and Automotive (Q or S suffix)  
Grades  
Low-Power Device (L suffix)  
C64x+ L1/L2 Memory Architecture  
128K-Bit (16K-Byte) L1P Program  
RAM/Cache [Flexible Allocation]  
384K-Bit (48K-Byte) L1D Data RAM/Cache  
[Flexible Allocation]  
512K-Bit (64K-Byte) L2 Unified Mapped  
RAM/Cache [Flexible Allocation]  
Endianess: Supports Both Little Endian and  
Big Endian  
External Memory Interfaces (EMIFs)  
VelociTI.2™ Extensions to VelociTI™  
Advanced Very-Long-Instruction-Word (VLIW)  
TMS320C64x+™ DSP Core  
16-Bit DDR2 SDRAM Memory Controller  
With 128M-Byte Address Space (1.8-V I/O)  
Supports up to 266-MHz (data rate) bus  
and interfaces to DDR2-400 SDRAM  
Eight Highly Independent Functional Units  
With VelociTI.2 Extensions:  
Asynchronous 8-Bit-Wide EMIF (EMIFA)  
With up to 64M-Byte Address Reach  
Six ALUs (32-/40-Bit), Each Supports  
Single 32-Bit, Dual 16-Bit, or Quad 8-Bit  
Arithmetic per Clock Cycle  
Flash Memory Interfaces  
NOR (8-Bit-Wide Data)  
NAND (8-Bit-Wide Data)  
Two Multipliers Support Four 16 x 16-Bit  
Multiplies (32-Bit Results) per Clock  
Cycle or Eight 8 x 8-Bit Multiplies (16-Bit  
Results) per Clock Cycle  
Enhanced Direct-Memory-Access (EDMA)  
Controller (64 Independent Channels)  
Load-Store Architecture With Non-Aligned  
Support  
Two 64-Bit General-Purpose Timers (Each  
Configurable as Two 32-Bit Timers)  
64 32-Bit General-Purpose Registers  
Instruction Packing Reduces Code Size  
All Instructions Conditional  
One 64-Bit Watch Dog Timer  
One UART With RTS and CTS Flow Control  
Master/Slave Inter-Integrated Circuit  
(I2C Bus™)  
Additional C64x+™ Enhancements  
Protected Mode Operation  
Exceptions Support for Error Detection  
and Program Redirection  
Multichannel Buffered Serial Port (McBSP0)  
I2S and TDM  
AC97 Audio Codec Interface  
SPI  
Standard Voice Codec Interface (AIC12)  
Telecom Interfaces – ST-Bus, H-100  
128 Channel Mode  
Hardware Support for Modulo Loop  
Auto-Focus Module Operation  
C64x+ Instruction Set Features  
Byte-Addressable (8-/16-/32-/64-Bit Data)  
8-Bit Overflow Protection  
Bit-Field Extract, Set, Clear  
Normalization, Saturation, Bit-Counting  
VelociTI.2 Increased Orthogonality  
C64x+ Extensions  
Multichannel Audio Serial Port (McASP0)  
Four Serializers and SPDIF (DIT) Mode  
16-Bit Host-Port Interface (HPI)  
10/100 Mb/s Ethernet MAC (EMAC)  
Compact 16-bit Instructions  
Additional Instructions to Support  
Complex Multiplies  
IEEE 802.3 Compliant  
Supports Multiple Media Independent  
Interfaces (MII, RMII)  
Management Data I/O (MDIO) Module  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this document.  
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2007–2008, Texas Instruments Incorporated  
 

TMS320C6421ZWTQ5 替代型号

型号 品牌 替代类型 描述 数据表
TMS320C6421ZDUQ5 TI

类似代替

C64x+ 定点 DSP- 高达 600MHz、8 位 EMIFA、16 位 DDR2 |
TMS320C6421ZWT5 TI

类似代替

C64x+ 定点 DSP- 高达 600MHz、8 位 EMIFA、16 位 DDR2、S

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