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TM4SN64EPN PDF预览

TM4SN64EPN

更新时间: 2024-11-04 21:53:51
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
16页 273K
描述
SYNCHRONOUS DYNAMIC RAM MODULES

TM4SN64EPN 数据手册

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TM2SN64EPN 2097152 BY 64-BIT  
TM4SN64EPN 4194304 BY 64-BIT  
SYNCHRONOUS DYNAMIC RAM MODULES  
SMMS696 – AUGUST 1997  
Organization:  
– TM2SN64EPN . . . 2 097 152 x 64 Bits  
– TM4SN64EPN . . . 4 194 304 x 64 Bits  
High-Speed, Low-Noise Low-Voltage TTL  
(LVTTL) Interface  
Read Latencies 2 and 3 Supported  
Single 3.3-V Power Supply  
(±10% Tolerance)  
Support Burst-Interleave and  
Burst-Interrupt Operations  
Designed for 66-MHz 4-Clock Systems  
Burst Length Programmable to 1, 2, 4,  
and 8  
JEDEC 168-Pin Dual-In-Line Memory  
Module (DIMM) Without Buffer for Use With  
Socket  
Two Banks for On-Chip Interleaving  
(Gapless Access)  
TM2SN64EPN — Uses Eight 16M-Bit  
Synchronous Dynamic RAMs (SDRAMs)  
(2M × 8-Bit) in Plastic Thin Small-Outline  
Packages (TSOPs)  
Ambient Temperature Range  
0°C to 70°C  
Gold-Plated Contacts  
Pipeline Architecture  
TM4SN64EPN — Uses Sixteen 16M-Bit  
SDRAMs (2M × 8-Bit) in Plastic TSOPs  
Serial Presence-Detect (SPD) Using  
EEPROM  
Byte-Read/Write Capability  
Performance Ranges:  
SYNCHRONOUS  
CLOCK CYCLE  
TIME  
ACCESS TIME  
CLOCK TO  
OUTPUT  
REFRESH  
INTERVAL  
t
t
t
t
CK2  
CK3  
CK2  
CK3  
(CL = 3)  
(CL = 2) (CL = 3) (CL = 2)  
’xSN64EPN-10  
’xSN64EPN-12  
10 ns  
15 ns  
15 ns  
7.5 ns  
8 ns  
8 ns  
9 ns  
64 ms  
64 ms  
12 ns  
CL = CAS latency  
description  
The TM2SN64EPN is a 16M-byte, 168-pin dual-in-line memory module (DIMM). The DIMM is composed of  
eight TMS626812ADGE, 2097152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic thin small-outline package  
(TSOP) mounted on a substrate with decoupling capacitors. See the TMS626812A data sheet (literature  
number SMOS691).  
The TM4SN64EPN is a 32M-byte, 168-pin DIMM. The DIMM is composed of sixteen TMS626812ADGE,  
2097152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic TSOP mounted on a substrate with decoupling  
capacitors. See the TMS626812A data sheet (literature number SMOS691).  
operation  
The TM2SN64EPN operates as eight TMS626812ADGE devices that are connected as shown in the  
TM2SN64EPN functional block diagram. The TM4SN64EPN operates as sixteen TMS626812ADGE devices  
connected as shown in the TM4SN64EPN functional block diagram.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
1
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443  

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