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TM4TR64EPH-8A

更新时间： 2024-11-06 20:04:43
品牌 Logo 应用领域
德州仪器 - TI 时钟动态存储器内存集成电路
页数 文件大小 规格书
22页 353K
描述
4MX64 SYNCHRONOUS DRAM MODULE, 6ns, DMA168, DIMM-168

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TM4TR64EPH-8A 技术参数

生命周期：Obsolete零件包装代码：DIMM
包装说明：DIMM-168针数：168
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.32.00.24风险等级：5.84
Is Samacsys：N访问模式：DUAL BANK PAGE BURST
最长访问时间：6 ns最大时钟频率 (fCLK)：125 MHz
I/O 类型：COMMONJESD-30 代码：R-XDMA-N168
内存密度：268435456 bit内存集成电路类型：SYNCHRONOUS DRAM MODULE
内存宽度：64功能数量：1
端口数量：1端子数量：168
字数：4194304 words字数代码：4000000
工作模式：SYNCHRONOUS最高工作温度：70 °C
最低工作温度：组织：4MX64
输出特性：3-STATE封装主体材料：UNSPECIFIED
封装代码：DIMM封装等效代码：DIMM168
封装形状：RECTANGULAR封装形式：MICROELECTRONIC ASSEMBLY
电源：3.3 V认证状态：Not Qualified
刷新周期：4096最大待机电流：0.001 A
子类别：DRAMs最大压摆率：0.15 mA
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：3.3 V表面贴装：NO
技术：CMOS温度等级：COMMERCIAL
端子形式：NO LEAD端子节距：1.27 mm
端子位置：DUALBase Number Matches：1

TM4TR64EPH-8A 数据手册

 浏览型号TM4TR64EPH-8A的Datasheet PDF文件第2页浏览型号TM4TR64EPH-8A的Datasheet PDF文件第3页浏览型号TM4TR64EPH-8A的Datasheet PDF文件第4页浏览型号TM4TR64EPH-8A的Datasheet PDF文件第5页浏览型号TM4TR64EPH-8A的Datasheet PDF文件第6页浏览型号TM4TR64EPH-8A的Datasheet PDF文件第7页 
TM2TR64EPH, TM4TR64EPH  
TM2TR72EPH, TM4TR72EPH  
SYNCHRONOUS DYNAMIC RAM MODULES  
SMMS702B – JANUARY 1998 – REVISED APRIL 1998  
D
D
Organization:  
D
JEDEC 168-Pin Dual-In-Line Memory  
Module (DIMM) Without Buffer for Use With  
Socket  
– TM2TR64EPH . . . 2 097 152 x 64 Bits  
– TM4TR64EPH . . . 4 194 304 x 64 Bits  
– TM2TR72EPH . . . 2 097 152 x 72 Bits  
– TM4TR72EPH . . . 4 194 304 x 72 Bits  
D
D
D
D
D
D
D
D
D
High-Speed, Low-Noise, Low-Voltage TTL  
(LVTTL) Interface  
Single 3.3-V Power Supply  
(±10% Tolerance)  
Read Latencies 2 and 3 Supported  
Support Burst-Interleave and  
Burst-Interrupt Operations  
D
Designed for 100-MHz 4-Clock Systems  
D
TM2TR64EPH — Uses Eight 16M-Bit  
Synchronous Dynamic RAMs (SDRAMs)  
(2M × 8-Bit) in Plastic Thin Small-Outline  
Packages (TSOPs)  
Burst Length Programmable to 1, 2, 4,  
and 8  
Two Banks for On-Chip Interleaving  
(Gapless Access)  
D
D
D
TM4TR64EPH — Uses Sixteen 16M-Bit  
SDRAMs (2M × 8-Bit) in Plastic TSOPs  
Ambient Temperature Range  
0°C to 70°C  
TM2TR72EPH — Uses Nine 16M-Bit  
SDRAMs (2M × 8-Bit) in Plastic TSOPs  
Gold-Plated Contacts  
Pipeline Architecture  
TM4TR72EPH — Uses Eighteen 16M-Bit  
SDRAMs (2M × 8-Bit) in Plastic TSOPs  
Serial Presence Detect (SPD) Using  
EEPROM  
D
Byte-Read/Write Capability  
Performance Ranges:  
D
SYNCHRONOUS  
CLOCK CYCLE  
TIME  
ACCESS TIME  
CLOCK TO  
OUTPUT  
REFRESH  
INTERVAL  
t
t
t
t
AC2  
CK3  
CK2  
AC3  
†
(CL = 3)  
(CL = 2) (CL = 3) (CL = 2)  
’xTRxxEPH-8  
’xTRxxEPH-8A  
8 ns  
10 ns  
15 ns  
6 ns  
6 ns  
6 ns  
64 ms  
64 ms  
8 ns  
7.5 ns  
†
CL = CAS latency  
description  
The TM2TR64EPH is a 16M-byte, 168-pin DIMM. The DIMM is composed of eight TMS626812BDGE 2097152  
x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic TSOP mounted on a substrate with decoupling capacitors.  
See the TMS626812B data sheet (literature number SMOS693).  
The TM4TR64EPH is a 32M-byte, 168-pin DIMM. The DIMM is composed of sixteen TMS626812BDGE  
2097152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic TSOP mounted on a substrate with decoupling  
capacitors.  
The TM2TR72EPH is an 16M-byte, 168-pin DIMM. The DIMM is composed of nine TMS626812BDGE  
2097152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic TSOP mounted on a substrate with decoupling  
capacitors.  
The TM4TR72EPH is a 32M-byte, 168-pin DIMM. The DIMM is composed of eighteen TMS626812BDGE  
2097152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic TSOP mounted on a substrate with decoupling  
capacitors.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443  
1234567...22

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