Datasheet > TM2SN64EPN

TM2SN64EPN

更新时间： 2024-02-01 19:11:41

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
16页	273K
描述
SYNCHRONOUS DYNAMIC RAM MODULES

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

TM2SN64EPN 数据手册

TM2SN64EPN 2097152 BY 64-BIT

TM4SN64EPN 4194304 BY 64-BIT

SYNCHRONOUS DYNAMIC RAM MODULES

SMMS696 – AUGUST 1997

Organization:

– TM2SN64EPN . . . 2 097 152 x 64 Bits

– TM4SN64EPN . . . 4 194 304 x 64 Bits

High-Speed, Low-Noise Low-Voltage TTL

(LVTTL) Interface

Read Latencies 2 and 3 Supported

Single 3.3-V Power Supply

(±10% Tolerance)

Support Burst-Interleave and

Burst-Interrupt Operations

Designed for 66-MHz 4-Clock Systems

Burst Length Programmable to 1, 2, 4,

and 8

JEDEC 168-Pin Dual-In-Line Memory

Module (DIMM) Without Buffer for Use With

Socket

Two Banks for On-Chip Interleaving

(Gapless Access)

TM2SN64EPN — Uses Eight 16M-Bit

Synchronous Dynamic RAMs (SDRAMs)

(2M × 8-Bit) in Plastic Thin Small-Outline

Packages (TSOPs)

Ambient Temperature Range

0°C to 70°C

Gold-Plated Contacts

Pipeline Architecture

TM4SN64EPN — Uses Sixteen 16M-Bit

SDRAMs (2M × 8-Bit) in Plastic TSOPs

Serial Presence-Detect (SPD) Using

EEPROM

Byte-Read/Write Capability

Performance Ranges:

SYNCHRONOUS

CLOCK CYCLE

TIME

ACCESS TIME

CLOCK TO

OUTPUT

REFRESH

INTERVAL

CK2

CK3

CK2

CK3

†

(CL = 3)

(CL = 2) (CL = 3) (CL = 2)

’xSN64EPN-10

’xSN64EPN-12

10 ns

15 ns

7.5 ns

8 ns

9 ns

64 ms

12 ns

†

CL = CAS latency

description

The TM2SN64EPN is a 16M-byte, 168-pin dual-in-line memory module (DIMM). The DIMM is composed of

eight TMS626812ADGE, 2097152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic thin small-outline package

(TSOP) mounted on a substrate with decoupling capacitors. See the TMS626812A data sheet (literature

number SMOS691).

The TM4SN64EPN is a 32M-byte, 168-pin DIMM. The DIMM is composed of sixteen TMS626812ADGE,

2097152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic TSOP mounted on a substrate with decoupling

capacitors. See the TMS626812A data sheet (literature number SMOS691).

operation

The TM2SN64EPN operates as eight TMS626812ADGE devices that are connected as shown in the

TM2SN64EPN functional block diagram. The TM4SN64EPN operates as sixteen TMS626812ADGE devices

connected as shown in the TM4SN64EPN functional block diagram.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCT PREVIEW information concerns products in the formative or

design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right to

change or discontinue these products without notice.

POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

12 3 4 5 6 7...16

中文翻译

下载PDF

与TM2SN64EPN相关器件

型号	品牌	获取价格	描述	数据表
TM2SN64EPU	TI	获取价格	SYNCHRONOUS DYNAMIC RAM MODULES
TM2SN64EPU-12	TI	获取价格	SYNCHRONOUS DYNAMIC RAM MODULES
TM2SN64EPU-12A	TI	获取价格	SYNCHRONOUS DYNAMIC RAM MODULES
TM2SR72EPH	TI	获取价格	SYNCHRONOUS DYNAMIC RAM MODULES
TM2SR72EPH-10BU	TI	获取价格	2MX72 SYNCHRONOUS DRAM MODULE, 7ns, DMA168, DIMM-168
TM2SR72EPHBU	TI	获取价格	2MX72 SYNCHRONOUS DRAM MODULE, 7.5ns, DMA168, DIMM-168
TM2SR72EPN	TI	获取价格	SYNCHRONOUS DYNAMIC RAM MODULES
TM2SR72EPN-10	TI	获取价格	2MX72 SYNCHRONOUS DRAM MODULE, DMA168, DIMM-168
TM2SR72EPU	TI	获取价格	SYNCHRONOUS DYNAMIC RAM MODULES
TM2TR64EPH	TI	获取价格	SYNCHRONOUS DYNAMIC RAM MODULES

与TM2SN64EPN相关文章

MBRS340T3G手册解读：参数说明、产品特性及应用
2024-06-28

4
PMOS管背靠背连接：串联还是并联？
2024-06-28

4
高压电解电容的分类与选型策略
2024-06-28

5
数码管：基本概念、分类、技术发展及市场趋势
2024-06-27

9

产品中心

服务支持

精选活动

关于我们

帮助中心

TM2SN64EPN

TM2SN64EPN 数据手册

与TM2SN64EPN相关器件

与TM2SN64EPN相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

TM2SN64EPN

TM2SN64EPN 数据手册

与TM2SN64EPN相关器件

与TM2SN64EPN相关文章

您还可以找

您在本页遇到什么问题？