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SMMS698A − JUNE 1997 − REVISED FEBRUARY 1998
D
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Organization
− TM2SR72EPN . . . 2097152 x 72 Bits
− TM4SR72EPN . . . 4194304 x 72 Bits
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High-Speed, Low-Noise Low-Voltage TTL
(LVTTL) Interface
Byte-Read/Write Capability
Single 3.3-V Power Supply
( 10% Tolerance)
Read Latencies 2 and 3 Supported
Support Burst-Interleave and
Burst-Interrupt Operations
D
Designed for 66-MHz 4-Clock Systems
D
JEDEC 168-Pin Dual-In-Line Memory
Module (DIMM) Without Buffer for Use With
Socket
Burst Length Programmable to 1, 2, 4,
and 8
Two Banks for On-Chip Interleaving
(Gapless Access)
D
TM2SR72EPN — Uses Nine 16M-Bit
Synchronous Dynamic RAMs (SDRAMs)
(2M × 8-Bit) in Plastic Thin Small-Outline
Packages (TSOPs)
Ambient Temperature Range
0°C to 70°C
Gold-Plated Contacts
Pipeline Architecture
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TM4SR72EPN — Uses 18 16M-Bit SDRAMs
(2M × 8-Bit) in Plastic TSOPs
Performance Ranges:
Serial Presence Detect (SPD) Using
EEPROM
SYNCHRONOUS
CLOCK CYCLE
TIME
ACCESS TIME
(CLOCK TO
OUTPUT)
REFRESH
INTERVAL
t
t
t
t
AC2
CK3
CK2
AC3
†
(CL = 3)
(CL = 2) (CL = 3) (CL = 2)
’xSR72EPN-10
10 ns
15 ns 7.5 ns 7 ns
64 ms
†
CL = CAS latency
description
The TM2SR72EPN is a 16M-byte, 168-pin dual-in-line memory module (DIMM). The DIMM is composed of nine
TMS626812ADGE, 2097152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic thin small-outline package
(TSOP) mounted on a substrate with decoupling capacitors. See the TMS626812A data sheet (literature
number SMOS691).
The TM4SR72EPN is a 32M-byte, 168-pin DIMM. The DIMM is composed of eighteen TMS626812ADGE,
2097152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic TSOP mounted on a substrate with decoupling
capacitors. See the TMS626812A data sheet (literature number SMOS691).
operation
The TM2SR72EPN operates as nine TMS626812ADGE devices that are connected as shown in the
TM2SR72EPN functional block diagram. The TM4SR72EPN operates as eighteen TMS626812ADGE devices
connected as shown in the TM4SR72EPN functional block diagram.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 1998, Texas Instruments Incorporated
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