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SMMS702B − JANUARY 1998 − REVISED APRIL 1998
D
D
Organization:
D
D
JEDEC 168-Pin Dual-In-Line Memory
Module (DIMM) Without Buffer for Use With
Socket
− TM2TR64EPH . . . 2 097 152 x 64 Bits
− TM4TR64EPH . . . 4 194 304 x 64 Bits
− TM2TR72EPH . . . 2 097 152 x 72 Bits
− TM4TR72EPH . . . 4 194 304 x 72 Bits
High-Speed, Low-Noise, Low-Voltage TTL
(LVTTL) Interface
Single 3.3-V Power Supply
( 10% Tolerance)
D
Read Latencies 2 and 3 Supported
D
Support Burst-Interleave and
Burst-Interrupt Operations
D
Designed for 100-MHz 4-Clock Systems
D
TM2TR64EPH — Uses Eight 16M-Bit
Synchronous Dynamic RAMs (SDRAMs)
(2M × 8-Bit) in Plastic Thin Small-Outline
Packages (TSOPs)
D
D
D
D
D
D
Burst Length Programmable to 1, 2, 4,
and 8
Two Banks for On-Chip Interleaving
(Gapless Access)
D
D
D
TM4TR64EPH — Uses Sixteen 16M-Bit
SDRAMs (2M × 8-Bit) in Plastic TSOPs
TM2TR72EPH — Uses Nine 16M-Bit
SDRAMs (2M × 8-Bit) in Plastic TSOPs
TM4TR72EPH — Uses Eighteen 16M-Bit
SDRAMs (2M × 8-Bit) in Plastic TSOPs
Byte-Read/Write Capability
Performance Ranges:
Ambient Temperature Range
0°C to 70°C
Gold-Plated Contacts
Pipeline Architecture
Serial Presence Detect (SPD) Using
EEPROM
D
D
SYNCHRONOUS
CLOCK CYCLE
TIME
ACCESS TIME
CLOCK TO
OUTPUT
REFRESH
INTERVAL
t
t
t
t
AC2
CK3
CK2
AC3
†
(CL = 3)
(CL = 2) (CL = 3) (CL = 2)
’xTRxxEPH-8
’xTRxxEPH-8A
8 ns
10 ns
15 ns
6 ns
6 ns
6 ns
64 ms
64 ms
8 ns
7.5 ns
†
CL = CAS latency
description
The TM2TR64EPH is a 16M-byte, 168-pin DIMM. The DIMM is composed of eight TMS626812BDGE 2097152
x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic TSOP mounted on a substrate with decoupling capacitors.
See the TMS626812B data sheet (literature number SMOS693).
The TM4TR64EPH is a 32M-byte, 168-pin DIMM. The DIMM is composed of sixteen TMS626812BDGE
2097152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic TSOP mounted on a substrate with decoupling
capacitors.
The TM2TR72EPH is an 16M-byte, 168-pin DIMM. The DIMM is composed of nine TMS626812BDGE
2097152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic TSOP mounted on a substrate with decoupling
capacitors.
The TM4TR72EPH is a 32M-byte, 168-pin DIMM. The DIMM is composed of eighteen TMS626812BDGE
2097152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic TSOP mounted on a substrate with decoupling
capacitors.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 1998, Texas Instruments Incorporated
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ꢜ ꢠ ꢝ ꢜꢕ ꢖꢪ ꢘꢗ ꢛ ꢣꢣ ꢡꢛ ꢙ ꢛ ꢚ ꢠ ꢜ ꢠ ꢙ ꢝ ꢥ
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