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TL16C450FNG4 PDF预览

TL16C450FNG4

更新时间: 2024-11-22 15:54:27
品牌 Logo 应用领域
德州仪器 - TI 通信时钟数据传输先进先出芯片外围集成电路
页数 文件大小 规格书
27页 389K
描述
Single UART Without FIFO 44-PLCC 0 to 70

TL16C450FNG4 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:LCC包装说明:GREEN, PLASTIC, LCC-44
针数:44Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.31.00.01
风险等级:5.64Is Samacsys:N
地址总线宽度:3边界扫描:NO
最大时钟频率:3.072 MHz通信协议:ASYNC, BIT
数据编码/解码方法:NRZ最大数据传输速率:0.03125 MBps
外部数据总线宽度:8JESD-30 代码:S-PQCC-J44
JESD-609代码:e4长度:16.585 mm
低功率模式:NO湿度敏感等级:3
串行 I/O 数:1端子数量:44
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC44,.7SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):260
电源:5 V认证状态:Not Qualified
座面最大高度:4.57 mm子类别:Serial IO/Communication Controllers
最大压摆率:10 mA最大供电电压:5.25 V
最小供电电压:4.75 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:16.585 mmuPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches:1

TL16C450FNG4 数据手册

 浏览型号TL16C450FNG4的Datasheet PDF文件第2页浏览型号TL16C450FNG4的Datasheet PDF文件第3页浏览型号TL16C450FNG4的Datasheet PDF文件第4页浏览型号TL16C450FNG4的Datasheet PDF文件第5页浏览型号TL16C450FNG4的Datasheet PDF文件第6页浏览型号TL16C450FNG4的Datasheet PDF文件第7页 
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ  
ꢈꢉꢊ ꢋꢄꢌꢍ ꢎꢋ ꢎꢏꢉ ꢄꢎ ꢐ ꢐꢏꢋ ꢑꢄꢈꢀ ꢑꢎ ꢋꢉ ꢒ ꢁꢒ ꢐ ꢒꢋ ꢀ  
SLLS037C − MARCH 1988 − REVISED JANUARY 2006  
N PACKAGE  
(TOP VIEW)  
D Programmable Baud Rate Generator Allows  
Division of Any Input Reference Clock by 1  
16  
D0  
to (2 −1) and Generates an Internal 16×  
Clock  
V
RI  
DCD  
DSR  
CTS  
MR  
1
40  
39  
38  
37  
36  
35  
34  
CC  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
2
3
D Full Double Buffering Eliminates the Need  
4
for Precise Synchronization  
5
D Standard Asynchronous Communication  
Bits (Start, Stop, and Parity) Added or  
Deleted to or From the Serial Data Stream  
6
OUT1  
7
8
33 DTR  
32 RTS  
RCLK  
SIN  
SOUT  
CS0  
CS1  
CS2  
9
D Independent Receiver Clock Input  
10  
11  
12  
13  
14  
15  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
OUT2  
INTRPT  
NC  
A0  
A1  
A2  
ADS  
CSOUT  
DDIS  
DISTR  
DISTR  
D Transmit, Receive, Line Status, and Data  
Set Interrupts Independently Controlled  
D Fully Programmable Serial Interface  
Characteristics:  
BAUDOUT  
5-, 6-, 7-, or 8-Bit Characters  
− Even-, Odd-, or No-Parity Bit Generation  
and Detection  
1-, 1 1/2-, or 2-Stop Bit Generation  
− Baud Generation (dc to 256 Kbit/s)  
XTAL1 16  
XTAL2 17  
18  
19  
20  
DOSTR  
DOSTR  
V
SS  
D False Start Bit Detection  
NOTE: 40-pin DIP (N package) will be obsoleted as of 7/30/2006. Please  
contact your local distributor or TI Sales Office for more information.  
D Complete Status Reporting Capabilities  
FN PACKAGE  
(TOP VIEW)  
D 3-State TTL Drive Capabilities for  
Bidirectional Data Bus and Control Bus  
D Line Break Generation and Detection  
D Internal Diagnostic Capabilities:  
− Loopback Controls for Communications  
Link Fault Isolation  
6 5  
4
3
2
1 44 43 42 41 40  
39 MR  
7
D5  
D6  
D7  
8
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
OUT1  
DTR  
RTS  
OUT2  
NC  
INTRPT  
NC  
A0  
9
− Break, Parity, Overrun, Framing Error  
Simulation  
10  
11  
12  
13  
14  
15  
16  
17  
RCLK  
SIN  
NC  
SOUT  
CS0  
D Fully Prioritized Interrupt System Controls  
D Modem Control Functions (CTS, RTS, DSR,  
DTR, RI, and DCD)  
CS1  
CS2  
BAUDOUT  
D Easily Interfaces to Most Popular  
A1  
A2  
Microprocessors  
18 19 20 21 22 23 24 25 26 27 28  
D Faster Plug-In Replacement for National  
Semiconductor NS16C450  
NC − No internal connection  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢀꢠ  
Copyright 1988 − 2006, Texas Instruments Incorporated  
ꢜ ꢠ ꢝ ꢜꢕ ꢖꢪ ꢘꢗ ꢛ ꢣꢣ ꢡꢛ ꢙ ꢛ ꢚ ꢠ ꢜ ꢠ ꢙ ꢝ ꢥ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

TL16C450FNG4 替代型号

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