Datasheet > 微控制器和处理器 > 串行 IO/通信控制器> TL16C550AFN

TL16C550AFN

更新时间： 2024-01-31 22:48:33

品牌	Logo	应用领域
德州仪器 - TI		微控制器和处理器串行IO控制器通信控制器外围集成电路数据传输时钟
页数	文件大小	规格书
31页	434K
描述
ASYNCHRONOUS COMMUNICATIONS ELEMENT

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技术参数
数据手册

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TL16C550AFN 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	BGA
包装说明：	VFBGA, BGA24,5X5,20	针数：	24
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	Factory Lead Time：	1 week
风险等级：	5.72	Is Samacsys：	N
其他特性：	ALSO OPERATES AT 2.5V/3.3V SUPPLY	地址总线宽度：	3
边界扫描：	NO	最大时钟频率：	24 MHz
通信协议：	ASYNC, BIT	最大数据传输速率：	0.1875 MBps
外部数据总线宽度：	8	JESD-30 代码：	S-PBGA-B24
JESD-609代码：	e1	长度：	3 mm
低功率模式：	NO	湿度敏感等级：	1
串行 I/O 数：	1	端子数量：	24
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	VFBGA
封装等效代码：	BGA24,5X5,20	封装形状：	SQUARE
封装形式：	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	峰值回流温度（摄氏度）：	260
电源：	2.5/5 V	认证状态：	Not Qualified
座面最大高度：	1 mm	子类别：	Serial IO/Communication Controllers
最大供电电压：	5.5 V	最小供电电压：	4.5 V
标称供电电压：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	Tin/Silver/Copper (Sn/Ag/Cu)	端子形式：	BALL
端子节距：	0.5 mm	端子位置：	BOTTOM
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	3 mm
uPs/uCs/外围集成电路类型：	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL	Base Number Matches：	1

TL16C550AFN 数据手册

TL16C550A

ASYNCHRONOUS COMMUNICATIONS ELEMENT

SLLS057D – AUGUST 1989 – REVISED MARCH 1996

Capable of Running With All Existing

TL16C450 Software

Fully Programmable Serial Interface

Characteristics:

– 5-, 6-, 7-, or 8-Bit Characters

– Even-, Odd-, or No-Parity Bit Generation

and Detection

– 1-, 1 1/2-, or 2-Stop Bit Generation

– Baud Generation (dc to 256 Kbit/s)

After Reset, All Registers Are Identical to

the TL16C450 Register Set

In the FIFO Mode, Transmitter and Receiver

Are Each Buffered With 16-Byte FIFOs to

Reduce the Number of Interrupts to the

CPU

False-Start Bit Detection

Complete Status Reporting Capabilities

In the TL16C450 Mode, Holding and Shift

Registers Eliminate the Need for Precise

Synchronization Between the CPU and

Serial Data

3-State TTL Drive Capabilities for

Bidirectional Data Bus and Control Bus

Line Break Generation and Detection

Programmable Baud Rate Generator Allows

Division of Any Input Reference Clock by 1

to (2 –1) and Generates an Internal 16×

Internal Diagnostic Capabilities:

– Loopback Controls for Communications

Link Fault Isolation

– Break, Parity, Overrun, Framing Error

Simulation

Clock

Standard Asynchronous Communication

Bits (Start, Stop, and Parity) Added to or

Deleted From the Serial Data Stream

Fully Prioritized Interrupt System Controls

Modem Control Functions (CTS, RTS, DSR,

DTR, RI, and DCD)

Independent Receiver Clock Input

Transmit, Receive, Line Status, and Data

Set Interrupts Independently Controlled

Faster Plug-In Replacement for National

Semiconductor NS16550A

description

The TL16C550A is a functional upgrade of the TL16C450 asynchronous communications element (ACE).

†

Functionally identical to the TL16C450 on power up (character mode ), the TL16C550A can be placed in an

alternate mode (FIFO) to relieve the CPU of excessive software overhead.

In this mode, internal FIFOs are activated allowing 16 bytes (plus 3 bits of error data per byte in the receiver

FIFO) to be stored in both receive and transmit modes. To minimize system overhead and maximize system

efficiency, all logic is on the chip. Two of the TL16C450 terminal functions (terminals 24 and 29 on the N package

and terminals 27 and 32 on the FN package) have been changed to allow signalling of direct memory address

(DMA) transfers.

The TL16C550A performs serial-to-parallel conversion on data received from a peripheral device or modem

and parallel-to-serial conversion on data received from its CPU. The CPU can read and report on the status of

the ACE at any point in the ACE’s operation. Reported status information includes the type of transfer operation

in progress, the status of the operation, and any error conditions encountered.

The TL16C550A ACE includes a programmable, on-board, baud rate generator. This generator is capable of

dividing a reference clock input by divisors from 1 to (2 –1) and producing a 16× clock for driving the internal

transmitter logic. Provisions are included to use this 16× clock to drive the receiver logic. Also included in the

ACE is a complete modem control capability and a processor interrupt system that may be software tailored

to the user’s requirements to minimize the computing required to handle the communications link.

†

The TL16C550A can also be reset to the TL16C450 mode under software control.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...31

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与TL16C550AFN相关器件

型号	品牌	描述	获取价格	数据表
TL16C550AFNR	TI	暂无描述	获取价格
TL16C550AN	TI	ASYNCHRONOUS COMMUNICATIONS ELEMENT	获取价格
TL16C550B	TI	ASYNCHRONOUS COMMUNICATIONS ELEMENT	获取价格
TL16C550BFN	TI	ASYNCHRONOUS COMMUNICATIONS ELEMENT	获取价格
TL16C550BFNR	TI	Single UART with 16-Byte FIFOs 44-PLCC 0 to 70	获取价格
TL16C550BI	TI	ASYNCHRONOUS COMMUNICATIONS ELEMENT	获取价格

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