5秒后页面跳转
TJA1021U/20 PDF预览

TJA1021U/20

更新时间: 2024-09-19 19:49:03
品牌 Logo 应用领域
恩智浦 - NXP 电信电信集成电路
页数 文件大小 规格书
22页 119K
描述
IC DATACOM, INTERFACE CIRCUIT, UUC, DIE, Network Interface

TJA1021U/20 技术参数

生命周期:Obsolete零件包装代码:DIE
包装说明:DIEReach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.74
JESD-30 代码:R-XUUC-N功能数量:1
封装主体材料:UNSPECIFIED封装代码:DIE
封装形状:RECTANGULAR封装形式:UNCASED CHIP
筛选级别:AEC-Q100; AEC-Q101标称供电电压:12 V
表面贴装:YES电信集成电路类型:INTERFACE CIRCUIT
端子形式:NO LEAD端子位置:UPPER
Base Number Matches:1

TJA1021U/20 数据手册

 浏览型号TJA1021U/20的Datasheet PDF文件第2页浏览型号TJA1021U/20的Datasheet PDF文件第3页浏览型号TJA1021U/20的Datasheet PDF文件第4页浏览型号TJA1021U/20的Datasheet PDF文件第5页浏览型号TJA1021U/20的Datasheet PDF文件第6页浏览型号TJA1021U/20的Datasheet PDF文件第7页 
TJA1021  
LIN 2.0/SAE J2602 transceiver  
Rev. 01 — 16 October 2006  
Objective data sheet  
1. General description  
The TJA1021 is the interface between the Local Interconnect Network (LIN) master/slave  
protocol controller and the physical bus in a LIN. It is primarily intended for in-vehicle  
sub-networks using baud rates from 1 kBd up to 20 kBd and is LIN 2.0/SAE J2602  
compliant. The TJA1021 is pin-to-pin compatible with the TJA1020 and improved on  
ElectroStatic Discharge (ESD).  
The transmit data stream of the protocol controller at the transmit data input (TXD) is  
converted by the TJA1021 into a bus signal with optimized slew rate and wave shaping to  
minimize ElectroMagnetic Emission (EME). The LIN bus output pin is pulled HIGH via an  
internal termination resistor. For a master application an external resistor in series with a  
diode should be connected between pin INH or pin VBAT and pin LIN. The receiver detects  
the data stream at the LIN bus input pin and transfers it via pin RXD to the microcontroller.  
In sleep mode the power consumption of the TJA1021 is very low, whereas in failure  
modes the power consumption is reduced to a minimum.  
2. Features  
2.1 General  
I LIN 2.0/SAE J2602 compliant  
I Baud rate up to 20 kBd  
I Very low ElectroMagnetic Emission (EME)  
I High ElectroMagnetic Immunity (EMI)  
I Passive behavior in unpowered state  
I Input levels compatible with 3.3 V and 5 V devices  
I Integrated termination resistor for LIN slave applications  
I Wake-up source recognition (local or remote)  
I Supports K-line like functions  
I Pin-to-pin compatible with TJA1020  
2.2 Low power management  
I Very low current consumption in sleep mode with local and remote wake-up  
2.3 Protections  
I High ESD robustness: ≥ ±6 kV according to IEC 61000-4-2 for pins LIN, VBAT and  
WAKE_N  
I Transmit data (TXD) dominant time-out function  

与TJA1021U/20相关器件

型号 品牌 获取价格 描述 数据表
TJA1022HG NXP

获取价格

Dual LIN 2.2A/SAE J2602 Transceiver
TJA1022T NXP

获取价格

Dual LIN 2.2A/SAE J2602 transceiver
TJA1022T,118 NXP

获取价格

TJA1022 - Dual LIN 2.2A/SAE J2602 transceiver SOIC 14-Pin
TJA1022TK NXP

获取价格

Dual LIN 2.2A/SAE J2602 transceiver
TJA1022TK,118 NXP

获取价格

TJA1022 - Dual LIN 2.2A/SAE J2602 transceiver SON 14-Pin
TJA1022TK/10,118 NXP

获取价格

TJA1022 - Dual LIN 2.2A/SAE J2602 transceiver SON 14-Pin
TJA1022TK/20,118 NXP

获取价格

TJA1022 - Dual LIN 2.2A/SAE J2602 transceiver SON 14-Pin
TJA1024HG NXP

获取价格

Quad LIN 2.2A/SAE J2602 transceiver
TJA1027 NXP

获取价格

ISO 17987/LIN 2.x/SAE J2602 transceiver
TJA1027T NXP

获取价格

Interface Circuit