5秒后页面跳转
TIBPSG507ACNT PDF预览

TIBPSG507ACNT

更新时间: 2024-11-04 02:58:39
品牌 Logo 应用领域
德州仪器 - TI 时钟输入元件光电二极管可编程逻辑
页数 文件大小 规格书
19页 361K
描述
13 × 80 × 8 PROGRAMMABLE SEQUENCE GENERATOR

TIBPSG507ACNT 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete包装说明:DIP, DIP24,.3
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.87其他特性:F_MAX FOR 6-BIT COUNTER CNT_/HLD0 APPLICATION = 33MHZ; PROGRAMMABLE SEQUENCE GENERATOR
架构:PLS-TYPE最大时钟频率:45 MHz
JESD-30 代码:R-PDIP-T24长度:31.64 mm
专用输入次数:12I/O 线路数量:
输入次数:13输出次数:8
产品条款数:80端子数量:24
最高工作温度:75 °C最低工作温度:
组织:12 DEDICATED INPUTS, 0 I/O输出函数:MACROCELL
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP24,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V可编程逻辑类型:OT PLD
传播延迟:20 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:Programmable Logic Devices
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:NO
技术:TTL温度等级:COMMERCIAL EXTENDED
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

TIBPSG507ACNT 数据手册

 浏览型号TIBPSG507ACNT的Datasheet PDF文件第2页浏览型号TIBPSG507ACNT的Datasheet PDF文件第3页浏览型号TIBPSG507ACNT的Datasheet PDF文件第4页浏览型号TIBPSG507ACNT的Datasheet PDF文件第5页浏览型号TIBPSG507ACNT的Datasheet PDF文件第6页浏览型号TIBPSG507ACNT的Datasheet PDF文件第7页 
TIBPSG507AC  
13 × 80 × 8 PROGRAMMABLE SEQUENCE GENERATOR  
SRPS002D – D3029, MAY 1987 – REVISED NOVEMBER 1995  
JT OR NT PACKAGE  
(TOP VIEW)  
58-MHz Max Clock Rate  
Ideal for Waveform Generation and  
High-Performance State Machine  
Applications  
CLK  
I0  
V
CC  
I6  
I7  
I8  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
2
I1  
I2  
I3  
I4  
3
6-Bit Internal Binary Counter  
8-Bit Internal State Register  
Programmable Clock Polarity  
4
I9  
5
I10  
I11  
I12/OE  
Q7  
Q6  
Q5  
Q4  
6
I5  
7
Q0  
Q1  
Q2  
Q3  
GND  
8
Outputs Programmable for Registered or  
Combinational Operation  
9
10  
11  
12  
6-Bit Counter Simplifies Logic Equation  
Development in State Machine Designs  
Programmable Output Enable  
FK OR FN PACKAGE  
(TOP VIEW)  
description  
The TIBPSG507AC is  
a 13 × 80 × 8  
Programmable Sequence Generator (PSG) that  
offers the system designer unprecedented  
4
3
2
1
28 27 26  
25  
5
I2  
I3  
I4  
NC  
I5  
Q0  
Q1  
I8  
I9  
I10  
flexibility  
in  
a
high-performance  
6
24  
23  
field-programmable logic device. Applications  
such as waveform generators, state machines,  
dividers, timers, and simple logic reduction are all  
possible with the PSG. By utilizing the built
binary counter, the PSG is capable of generating  
complex timing controllers. The binary counter  
also simplifies logic equation development in state  
machine and waveform generator applicas.  
7
8
22 NC  
21 I11  
20 I12/OE  
19 Q7  
9
10  
11  
12 13 14 15 16 17 18  
The TIBPSG507AC contains 80 product (AND)  
terms, a 6-bit binary counter with control logic,  
eight S/R state holding registers, and eight  
outputs. The eight outputs can be individually  
NC – No internal connection  
programmed  
for  
either  
registered  
or  
combinational operation. The clock input is fuse  
programmable for either positive- or negative-  
edge operation.  
The 6-bit binary counter is trolled by a synchronous-clear and a count/hold function. Each control function  
has a nonregistered and registered option. When either SCLR0 or SCLR1 is taken high, the counter resets to  
zero on the next active clock edge. When either CNT/HLD0 or CNT/HLD1 is taken high, the counter is held at  
the present count and is not allowed to advance on the active clock edge. The SCLR function overrides the  
CNT/HLD feature when both lines are simultaneously high.  
Clock polarity is programmable through the clock polarity fuse. Leaving this fuse intact selects positive-edge  
triggering. Negative-edge triggering is selected by blowing this fuse. Pin 17 functions as an input and/or an  
output enable. When the output enable fuse is intact, all outputs are always enabled allowing pin 17 to be used  
strictly as aput. Blowing the output enable fuse lets pin 17 function as an output enable and an input. In this  
mode, the uts are enabled when pin 17 is low and are in a high-impedance state when pin 17 is high.  
PRODUCTION DATA information is current as of publication date.  
Copyright 1995, Texas Instruments Incorporated  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
1

与TIBPSG507ACNT相关器件

型号 品牌 获取价格 描述 数据表
TIBPSG507AMFK TI

获取价格

IC,SIMPLE-PLD,PLS-TYPE,TTL,LLCC,28PIN,CERAMIC
TIBPSG507AMJT TI

获取价格

IC,SIMPLE-PLD,PLS-TYPE,TTL,DIP,24PIN,CERAMIC
TIBPSG507CFK TI

获取价格

OT PLD, 12ns, CQCC28
TIBPSG507CFN TI

获取价格

OT PLD, 12ns, PQCC28
TIBPSG507CJT TI

获取价格

OT PLD, 12ns, CDIP24
TIBPSG507CNT TI

获取价格

OT PLD, 12ns, PDIP24
TIBPSG507MFK TI

获取价格

OT PLD, 12ns, CQCC28
TIBPSG507MJT TI

获取价格

OT PLD, 12ns, CDIP24
TIC10024-Q1 TI

获取价格

具有 SPI 的汽车类 35V 多开关检测接口 (MSDI)
TIC10024QDCPRQ1 TI

获取价格

具有 SPI 的汽车类 35V 多开关检测接口 (MSDI) | DCP | 38 | -